VCSEL Array Defect Blocking via Dielectric Trenches

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Solution Overview

Problem

Densely packed VCSEL arrays with ultra-low pitch are prone to multi-mesa defects, which can affect neighboring VCSELs and lead to device failure due to uneven brightness patterns, especially when VCSELs are arranged along a crystal axis.

Innovation Solution

A semiconductor device with a blocking structure arranged between VCSELs along a crystal axis to block defect propagation, combined with a bridge connecting the VCSELs that bends around the blocking structure, allowing for densely packed arrays without complete separation of mesas and separate electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If VCSELs are densely packed with ultra-low pitch to reduce chip area and manufacturing cost, then VCSEL array density increases and cost decreases, but multi-mesa defects propagate between neighboring VCSELs causing device failure

Engineering Contradiction:
ImproveVCSEL densityVSAvoiddevice reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent divides the continuous semiconductor structure into separate segments by introducing blocking structures (trenches filled with dielectric material) between adjacent VCSELs. This segmentation prevents defect propagation along crystal axes while maintaining dense packing, effectively resolving the contradiction between high density and reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The blocking structures act as intermediary elements between neighboring VCSELs. These dielectric-filled trenches serve as defect barriers that interrupt harmful defect propagation paths along crystal axes, allowing dense VCSEL arrangement without compromising device reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If blocking structures are introduced between VCSELs to prevent defect propagation, then device reliability improves, but chip area increases and manufacturing complexity increases

Engineering Contradiction:
Improvedevice reliabilityVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple functions into the blocking structures: they serve as defect barriers, electrical isolators, and mechanical support elements simultaneously. This merging reduces the need for separate components and simplifies the overall manufacturing process despite the added reliability function.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The blocking structures perform multiple functions: preventing defect propagation along crystal axes, providing electrical isolation between VCSELs, and serving as mechanical support. This multi-functionality reduces the need for additional separate structures, minimizing the increase in manufacturing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If complete separation of mesas with separate electrical connections is implemented to prevent defect propagation, then device reliability improves, but chip area increases and manufacturing cost increases

Engineering Contradiction:
Improvedevice reliabilityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Instead of complete separation of all mesas, the patent implements partial separation only where crystal axes align between adjacent VCSELs. This selective approach provides sufficient defect protection while minimizing the additional chip area required, avoiding the extremes of complete separation or no separation.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20220376479A1Densely packed vcsel array
Publication Date: 2022.11.24 BRILLIFY TECH INC
  • US20220376479A1 patent drawing
  • US20220376479A1 patent drawing
  • US20220376479A1 patent drawing

AI summary

A semiconductor device comprising an array of vertical cavity surface emitting lasers (VCSELs). The semiconductor device includes a first VCSEL having a first active area, a second VCSEL having a second active area, and a bridge connecting the first VCSEL and the second VCSEL. The first active area of the first VCSEL and the second active area of the second VCSEL are arranged along a first crystal axis. The semiconductor device further includes a blocking structure arranged between the first VCSEL and the second VCSEL. the blocking structure is configured to block a propagation of a defect between the first VCSEL and the second VCSEL along the first crystal axis.