VCSEL Flip-Chip Assembly for Precise Optical Alignment

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Solution Overview

Problem

The challenge in optical communications networks is to increase the number of transmit channels in optical transmitter or transceiver modules while maintaining high manufacturing yield and reducing costs, as existing methods face low yield and alignment issues when fabricating large arrays of vertical cavity surface emitting lasers (VCSELs) on a single semiconductor substrate or assembling multiple devices with few VCSELs.

Innovation Solution

A VCSEL flip-chip assembly is created using a substrate with electrically conductive contact pads and VCSEL flip chips, where each flip chip has an aperture for light emission, and nonconductive encapsulations or sealing compounds are used to prevent contamination and ensure precise optical alignment, leveraging high-precision flip-chip assembly technology to form a large array of precisely aligned VCSELs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a large array of VCSELs is fabricated on a single semiconductor substrate, then the number of transmit channels is increased, but the manufacturing yield decreases

Engineering Contradiction:
Improvenumber of VCSELsVSAvoidmanufacturing yield
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent divides the large array of VCSELs into multiple smaller semiconductor devices, each containing a subset of VCSELs (e.g., 4-16 VCSELs per device). This segmentation allows each device to be manufactured and tested independently, so that a defect in one device does not cause the entire large array to be discarded. The segmented devices are then assembled into a complete array module, resolving the contradiction between increasing VCSEL quantity and maintaining manufacturing yield.

Inventive Principle:
Principle #1Segmentation

2Reliability

If multiple semiconductor devices with few VCSELs are assembled to create a larger array, then manufacturing yield is improved, but alignment precision deteriorates

Engineering Contradiction:
Improvemanufacturing yieldVSAvoidalignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent introduces an intermediate substrate as a mediator between the multiple semiconductor devices and the final module. This intermediate substrate provides a stable platform with precise positioning features that facilitate accurate alignment of the segmented semiconductor devices. The intermediary substrate acts as a buffer that decouples the alignment requirements from the final assembly, enabling high-precision alignment even when assembling multiple separate devices.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Quantity of substance

If the pitch between adjacent VCSELs is decreased to increase integration density, then the number of VCSELs per substrate is increased, but manufacturing complexity increases

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the high-density VCSEL array into multiple smaller semiconductor devices, each with a manageable number of VCSELs at reduced pitch. This segmentation reduces the manufacturing complexity for each individual device while achieving high overall integration density through the assembly of multiple devices. The smaller device size simplifies fabrication processes, testing, and handling compared to manufacturing a single large array with the same total VCSEL count.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9620934B2Flip-chip assembly comprising an array of vertical cavity surface emitting lasers (VCSELs)
Publication Date: 2017.04.11 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US9620934B2 patent drawing
  • US9620934B2 patent drawing
  • US9620934B2 patent drawing

AI summary

A known flip-chip assembly manufacturing process is augmented by process steps of the invention to create a VCSEL flip-chip assembly comprising a plurality of semiconductor devices having respective arrays of a small number of VCSELs thereon, which are mounted on a substrate to form a large array of VCSELs that are precisely optically aligned with their respective optical coupling elements.