VCSEL Fabrication on Large Wafers via Unpatterned Bonding

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Solution Overview

Problem

The fabrication of vertical-cavity surface-emitting lasers (VCSELs) on large wafers faces challenges due to thermal expansion coefficient differences between GaAs-based and InP-based materials, leading to alignment issues and reduced efficiency in properly aligning patterned features, which complicates the dicing process and affects the reproducibility and yield of functional VCSELs.

Innovation Solution

The process involves bonding an un-patterned InP-based epi layer form onto a GaAs-based reflector form, followed by regrowth and patterning to form a tunnel junction, and then bonding a second reflector form, allowing for consistent alignment within a particular xy plane and avoiding issues related to thermal expansion coefficient differences.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If VCSELs are fabricated by separately preparing reflector blanks and patterned active region blank then bonding them together, then the active region is sandwiched between two reflectors, but thermal expansion coefficient differences cause misalignment of patterned features

Engineering Contradiction:
Improvealignment precisionVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The fabrication process is divided into distinct stages: first bonding unpatterned epi layers to a substrate, then performing regrowth to create patterned features, and finally bonding reflectors. This segmentation allows each stage to be optimized independently, avoiding the thermal expansion misalignment issues that occur when attempting to bond pre-patterned components together.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The epi layers are bonded to the substrate in an unpatterned state before any critical alignment features are created. This preliminary bonding action establishes a stable foundation that accommodates thermal expansion differences, and subsequent patterning is performed after bonding rather than before, eliminating the alignment precision problems.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If VCSELs are fabricated on large wafers (three inches or more), then production capacity increases, but thermal expansion differences reduce fabrication efficiency and yield

Engineering Contradiction:
Improvewafer sizeVSAvoidalignment accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The invention changes the temporal sequence of critical parameters: bonding occurs in an unpatterned state with different dimensional constraints than the final patterned state. This parameter change allows large wafers to be processed successfully by decoupling the bonding operation from the patterning operation, thereby maintaining both large wafer size and high alignment accuracy.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If patterned features are aligned on separate blanks before bonding, then the active region can be positioned between reflectors, but thermal expansion coefficient differences reduce alignment precision

Engineering Contradiction:
Improvefunctional yieldVSAvoidfeature alignment
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The substrate serves as an intermediary that first receives unpatterned epi layers, then undergoes regrowth to create patterned features. This intermediary approach allows the patterned features to be created in situ after bonding, using the substrate as a stable reference frame that is not subject to the same thermal expansion issues as separately prepared patterned blanks.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables accurate and efficient alignment of VCSEL features, improving the reproducibility and yield of VCSELs, particularly on larger wafers, and enhances their performance in high-speed fiber optic communication systems by ensuring reliable operation and durability.

Implementation Method 1

The un-patterned epi layer form is bonded onto the first reflector form

Methodology Applied
Scientific EffectWafer bonding: Welding

Implementation Method 2

performing a first regrowth to form first regrowth layers on the un-patterned epitaxially grown layers

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS11588299B2Vertical-cavity surface-emitting laser fabrication on large wafer
Publication Date: 2023.02.21 MELLANOX TECHNOLOGIES LTD(IL)
  • US11588299B2 patent drawing
  • US11588299B2 patent drawing
  • US11588299B2 patent drawing

AI summary

Methods for fabricating vertical cavity surface emitting lasers (VCSELs) on a large wafer are provided. An un-patterned epi layer form is bonded onto a first reflector form. The first reflector form includes a first reflector layer and a wafer of a first substrate type. The un-patterned epi layer form includes a plurality of un-patterned layers on a wafer of a second substrate type. The first and second substrate types have different thermal expansion coefficients. A resulting bonded blank is substantially non-varying in a plane that is normal to an intended emission direction of the VCSEL. A first regrowth is performed to form first regrowth layers, some of which are patterned to form a tunnel junction pattern. A second regrowth is performed to form second regrowth layers. A second reflector form is bonded onto the second regrowth layers, wherein the second reflector form includes a second reflector layer.