VCSEL Array Matrix Layout for Smaller Emitter Pitch

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing VCSEL arrays with both anode and cathode traces on the same surface result in a relatively large emitter pitch and chip size, which is undesirable for miniaturized optical systems.

Innovation Solution

A two-dimensional matrix addressable VCSEL array design featuring serpentine shaped anodes and cathodes, or isolation trenches, which increases emitter density and reduces emitter pitch and chip size, while also allowing for traces to span both the bottom surface and sidewalls of isolation trenches to reduce trace resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If both anode and cathode traces are disposed on the same surface of the substrate, then the VCSEL array structure is simplified, but the emitter pitch and chip size increase

Engineering Contradiction:

ImproveVCSEL array structureVSAvoidchip size

Core Design Contradiction:

Device complexityVSArea of stationary object

Solution Approach 1:

The cathode traces are extended from the top surface to the bottom surface of the substrate, utilizing the third dimension (depth) to route traces. This allows anodes to remain on the top surface while cathodes access the bottom surface, enabling closer emitter spacing without trace interference, thus reducing chip size while maintaining structural simplicity

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The cathode trace path is segmented into two parts: one segment on the top surface and another segment on the bottom surface, connected through vertical extensions. This segmentation allows the trace to efficiently connect emitters to the cathode contact layer without occupying excessive lateral space, reducing emitter pitch

Inventive Principle:

Principle #1Segmentation

2Device complexity

If traditional straight-line trace routing is used, then the trace layout is simple, but the trace resistance increases

Engineering Contradiction:

Improvetrace layoutVSAvoidtrace resistance

Core Design Contradiction:

Device complexityVSLoss of energy

Solution Approach 1:

Serpentine-shaped cathode traces are used instead of straight-line routing. The curved, winding path of the serpentine trace increases the effective trace length and surface area for current flow, reducing trace resistance and energy loss while maintaining a manageable layout complexity

Inventive Principle:

Principle #14Spheroidality (Curvature)

Solution Approach 2:

The cathode trace is merged with the isolation trench structure, where the trace follows the trench contour. This integration allows the trace to utilize the existing trench geometry, reducing the need for separate trace routing and minimizing additional layout complexity while achieving lower resistance through increased trace-surface contact

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS12308618B2Matrix addressable vertical cavity surface emitting laser array

Publication Date: 2025.05.20 WELLS FARGO BANK NA

AI summary

In some implementations, a vertical cavity surface emitting laser (VCSEL) array may include a substrate. In some implementations, the VCSEL array may include a set of cathodes disposed on the substrate in a first direction, wherein a cathode, of the set of cathodes, is defined by a serpentine shape. In some implementations, the VCSEL array may include a set of anodes disposed on the substrate in a second direction, wherein an anode, of the set of anodes, is defined by the serpentine shape.