VCSEL Device With Multiple Parallel Mesas for High Yield
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Solution Overview
Problem
State-of-the-art VCSEL devices with high optical output power require larger apertures, leading to increased die size and reduced yield, making them costly and temperature-sensitive, while existing methods for marking small semiconductor chips are inefficient.
Innovation Solution
A VCSEL device with between two and six mesas, electrically connected in parallel, emitting laser light with an optical power of 4 mW to 10 mW, and a method for marking semiconductor chips using a functional layer with a visible coding for identification, allowing for smaller chip size and improved yield and temperature stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the aperture diameter of VCSEL is increased to achieve high optical output power (≥6mW), then the optical power is improved, but the die size increases and manufacturing yield decreases
Solution Approach 1:
The VCSEL device is divided into multiple mesas (2-6 mesas) with smaller apertures (5-9μm each) instead of using a single large aperture. Each mesa acts as an independent light-emitting unit, and when operated in parallel, they collectively achieve the required high optical output power (4-10mW) while maintaining a small die size and high manufacturing yield
2Power
If the aperture diameter of VCSEL is increased to achieve high optical output power, then the optical power is improved, but the temperature sensitivity increases
Solution Approach 1:
By segmenting the light-emitting structure into multiple smaller mesas, the heat generation is distributed across multiple locations rather than concentrated in a single large aperture. This distributed heat generation reduces local thermal stress and improves overall temperature stability of the device
Solution Approach 2:
Each mesa is designed with optimized local characteristics (aperture size, active region configuration) that are better suited for stable operation at smaller scales. The local quality of each mesa is optimized independently, and the collective performance of multiple mesas provides both high power and temperature stability
3Productivity
If the die size is reduced to increase chips per wafer, then the cost is reduced, but the manufacturing yield and quality control become more difficult
Solution Approach 1:
The use of multiple small mesas on a compact die enables high-density integration of functional elements within a small area. This segmentation allows for better process control during manufacturing, as each mesa can be independently characterized and tested, improving overall quality control while maintaining small die size
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The VCSEL device achieves high yield and temperature stability with reduced chip size, enabling efficient production and cost-effective optical sensors, while the marking method simplifies tracing and quality management without additional manufacturing steps.
Implementation Method 1
VCSEL device wherein the VCSEL device is especially suited for sensing applications... the mesas are adapted to emit laser light if a defined threshold voltage is provided to the mesas
Data Source
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AI summary
The invention describes a laser device comprising between two and six mesas (120) provided on one semiconductor chip (110), wherein the mesas (120) are electrically connected in parallel such that the mesas (120) are adapted to emit laser light if a defined threshold voltage is provided to the mesas (120). Two to six mesas (120) with reduced active diameter in comparison to a laser device with one mesa improve the yield and performance despite of the fact that two to six mesas need more area on the semiconductor chip thus increasing the total size of the semiconductor chip (110). The invention further describes a method of marking semiconductor chips (110). A functional layer of the semiconductor chip (110) is provided and structured in a way that a single semiconductor chip (110) can be uniquely identified by means of optical detection of the structured functional layer. The structured layerenables identification of small semiconductor chips (110) with a size below 200 µm x 200 µm.