VCSEL Current Confinement Structure With Oxide-Treated P-Side Surface

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current confinement structures in vertical-cavity surface-emitting laser elements using nitride semiconductors require further improvement in insulating properties to enhance the reliability of the laser elements.

Innovation Solution

A method involving the formation of a nitride semiconductor layer with a mask member, followed by an oxide film on the p-side semiconductor layer, heat-treatment, and subsequent removal of the oxide film and mask member to create a current confinement structure with improved insulating properties, ensuring a flat surface for electrode placement.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional current confinement structures (insulating film with opening, plasma irradiation, ashing treatment, reactive ion etching) are used, then current injection regions can be defined, but insulating properties are insufficient and reliability is compromised

Engineering Contradiction:
Improvereliability of vertical-cavity surface-emitting laser elementsVSAvoidinsulating properties of current confinement structures
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

An oxide film is formed on the p-side semiconductor layer surface before electrode formation. This preliminary oxidation creates a stable insulating barrier that prevents current leakage and improves the reliability of the current confinement structure.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The surface of the p-side semiconductor layer is oxidized to form an oxide film, changing the electrical properties of the surface from conductive to insulating. This parameter change enhances the insulating properties and current confinement capability.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If the entire surface of the p-side semiconductor layer is covered with oxide film, then insulating properties improve, but current injection regions cannot be formed

Engineering Contradiction:
Improveinsulating propertiesVSAvoidcurrent injection region formation
Core Design Contradiction:
Object-affected harmful factorsVSEase of operation

Solution Approach 1:

The oxide film is selectively formed or removed to create different regions with different properties. The current injection regions have oxide film removed to maintain conductivity, while the current confinement regions retain the oxide film for insulation. This local differentiation achieves both current injection and confinement functions.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The p-side semiconductor layer surface is divided into distinct regions: current injection regions where the oxide film is removed, and current confinement regions where the oxide film is retained. This segmentation allows simultaneous achievement of electrical injection and current confinement.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If mask member is used to define current injection regions, then pattern formation is achieved, but insulating properties of current confinement structures are insufficient

Engineering Contradiction:
Improvecurrent injection region patterningVSAvoidinsulating properties
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The current confinement structure uses a composite approach combining a mask member for patterning with an oxide film for insulation. The oxide film is formed over the mask member and then selectively removed, creating a structure that benefits from both the patterning capability of the mask and the insulating properties of the oxide.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The oxide film is formed on the mask member before final pattern transfer. This preliminary oxidation ensures that the mask member is protected and that the subsequent etching or removal processes create well-defined current injection regions with proper insulation in the confinement areas.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method enhances the insulating properties and reliability of the vertical-cavity surface-emitting laser elements by reducing current concentration and preventing electrode breakage, thereby improving the life characteristics.

Implementation Method 1

forming an oxide film on the second portion of the surface of the p-side semiconductor layer and the mask member

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

heat-treating the nitride semiconductor layer and the oxide film

Methodology Applied
Scientific EffectHeat treatment: Heat Treatment

Data Source

PatentUS12603479B2Method of manufacturing vertical-cavity surface-emitting laser element
Publication Date: 2026.04.14 NICHIA CORP
  • US12603479B2 patent drawing
  • US12603479B2 patent drawing
  • US12603479B2 patent drawing

AI summary

A method of manufacturing a vertical-cavity surface-emitting laser element includes: providing a nitride semiconductor layer including an n-side semiconductor layer, an active layer, and a p-side semiconductor layer in this order; covering at least a first portion of a surface of the p-side semiconductor layer with a mask member while a second portion of the surface of the p-side semiconductor layer is not covered with the mask member; forming an oxide film on the second portion of the surface of the p-side semiconductor layer and the mask member; heat-treating the nitride semiconductor layer and the oxide film; removing the oxide film and the mask member after the heat-treating of the nitride semiconductor layer and the oxide film; and forming an electrode extending over the first portion and the second portion of the surface of the p-side semiconductor layer.