Bit-Stream Generator Using VDC Correlation for SC Division Accuracy
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Solution Overview
Problem
Existing stochastic computing division circuits face challenges in achieving high accuracy and efficiency due to the use of correlated bit-streams, which affect the functionality and hardware cost of arithmetic operations.
Innovation Solution
A bit-stream generator design incorporating a counter, random number generator, and comparator to produce correlated bit-streams, utilizing high-quality random sources like Sobol and Van der Corput sequences, which are used in SC division circuits to enhance accuracy and reduce hardware costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional correlated bit-stream generators are used in stochastic computing division circuits, then hardware cost is reduced, but accuracy deteriorates
Solution Approach 1:
The patent segments the bit-stream generation process into two distinct paths: one for generating the first bit-stream and another for generating the second bit-stream from the first. This segmentation allows independent optimization of each generation path, enabling the use of simpler hardware for the second stream while maintaining overall accuracy through the correlator mechanism.
Solution Approach 2:
The patent introduces a correlator as an intermediary component that processes the first bit-stream to generate the second bit-stream. This intermediary ensures the statistical properties and correlation requirements are met, bridging the gap between simple hardware generation and the accuracy requirements of stochastic division circuits.
2Measurement precision
If high-quality random sources are used to generate bit-streams, then accuracy is improved, but hardware cost increases
Solution Approach 1:
The patent performs preliminary action by generating the first bit-stream using high-quality random sources (Sobol or Van der Corput sequences) with appropriate statistical properties. This pre-generated bit-stream then serves as the input for generating the second bit-stream, allowing the system to achieve high accuracy without requiring two independent high-quality random source implementations.
Solution Approach 2:
The patent changes the parameter of randomness quality distribution: the first bit-stream uses high-quality random sources with specific statistical properties, while the second bit-stream is derived through transformation (correlation operation) rather than direct generation. This parameter change allows accuracy improvement without proportional hardware cost increase.
3Device complexity
If conventional bit-stream generation methods are used, then device complexity is reduced, but arithmetic errors increase
Solution Approach 1:
The patent introduces dynamic elements through the use of down counters that operate in different modes (modulo counting vs. zero counting) depending on the required operation. The correlator dynamically processes the first bit-stream to generate the second bit-stream, providing adaptive control that reduces arithmetic errors while maintaining manageable device complexity through structured dynamic behavior.
Data Source
AI summary
A cost-effective and highly efficient bit-stream generator for stochastic computing division circuits implementing powers-of-2 Van der Corput (VDC) sequences for bit-stream generation, providing high accuracy operation and low-cost implementation. The correlator design provides high-quality input bit-streams for all stochastic computing division designs, wherein a single random number generator is shared among the input bit-streams of the stochastic computing divider circuit.