VDMOS Shielding Gate Trenches Reduce On-Resistance
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Solution Overview
Problem
Existing VDMOS designs face challenges in reducing on-resistance (Ron) and capacitance, which impact power loss and overall efficiency in power management applications.
Innovation Solution
A VDMOS design featuring heavily doped substrates, epitaxial layers, trenches, shielding and control gates, distinct doping regions, and specific doping profiles to enhance charge coupling and reduce electric field, along with a method for forming these structures to achieve reduced Ron and increased breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional VDMOS structure is used, then device simplicity is maintained, but on-resistance and capacitance cannot be sufficiently reduced
Solution Approach 1:
The gate structure is segmented into two distinct gates: a control gate at the top and a shielding gate at the bottom, separated by an insulating layer. This segmentation allows independent optimization of control and shielding functions, reducing both on-resistance and capacitance while managing the increased structural complexity through functional specialization.
Solution Approach 2:
The shielding gate is nested within the trench structure at the bottom, with the insulating layer positioned between the control gate and shielding gate. This nested arrangement enables the shielding gate to be integrated into the existing trench architecture, reducing parasitic capacitance without significantly increasing overall device complexity.
2Loss of energy
If higher impurity concentration is used in the distinct doping region, then on-resistance is reduced, but breakdown voltage may be compromised
Solution Approach 1:
A distinct doping region with higher impurity concentration is created locally underneath the body region and extending toward the trench bottoms, while maintaining lower doping in other areas. This localized high-doping region reduces on-resistance specifically in the critical area near the shielding gate without compromising the overall breakdown voltage characteristics of the device.
Solution Approach 2:
The impurity concentration parameter is changed locally in the distinct doping region to be higher than the surrounding epitaxial layer, creating an optimized doping profile that reduces on-resistance while the overall device structure maintains adequate breakdown voltage through the controlled doping gradient.
3Loss of energy
If shielding gate is added to reduce capacitance, then device complexity increases, but manufacturing process becomes more difficult
Solution Approach 1:
The shielding gate is formed at the bottom of the trench during the preliminary trench formation process, before the control gate is created. The insulating layer is deposited between the two gates in advance, allowing both gates to be integrated into the device structure through a systematic sequence of manufacturing steps that manages complexity while achieving the capacitance reduction goal.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces on-resistance and capacitance, leading to improved power management efficiency and higher breakdown voltage, addressing the limitations of existing VDMOS technologies.
Implementation Method 1
the charge coupling effect at the distinct doping region between trenches is much more effective, and thus the electric field is further reduced
Implementation Method 2
a distinct doping region formed in the epitaxial layer underneath the body region, the distinct doping region extending towards bottoms of the first and second types of trenches, and having an impurity concentration higher than the epitaxial layer
Implementation Method 3
an epitaxial layer formed on the substrate
Data Source
AI summary
A VDMOS includes a substrate; an epitaxial layer; first and second trenches defined in the epitaxial layer; a shielding gate and a control gate formed in the trenches; a body region formed at the epitaxial layer and between the first and second trenches; a N+ source region formed at the body region; a distinct doping region formed in the epitaxial layer underneath the body region, extending towards bottoms of the trenches; a channel defined between the N+ source region and epitaxial layer adjacent to the trenches; an insulating layer defining a contact hole extending into the body region and the first trench; a P+ body pickup region formed in the body region corresponding to the contact hole; and a metal layer haying a butting contact filled in the contact hole, connecting the N+ source region, P+ body pickup region, and control gate and/or shielding gate in the first trench.