VDT Excitation Overcurrent Detection Using Partial RMS
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Solution Overview
Problem
Variable differential transformers (VDTs) in aerospace applications are vulnerable to overcurrent events, which can cause damage and require bulky, power-consuming overcurrent sense circuitry, necessitating improved detection methods.
Innovation Solution
Implementing a system that moves overcurrent sensing into a field programmable gate array (FPGA) to determine overcurrent events by sampling current values from a sense resistor, trimming and squaring them, calculating a mean, and disabling the driver circuit if outside a predefined range, thereby removing the need for bulky feedback circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional overcurrent sense circuitry is used to detect overcurrent events in VDTs, then overcurrent protection is achieved, but the system becomes bulky and power-consuming
Solution Approach 1:
The patent replaces traditional analog overcurrent sense circuitry with a digital processing system implemented in an FPGA. The FPGA samples current values through a sense resistor, processes them using digital algorithms (trimming, squaring, averaging), and determines overcurrent events programmatically. This substitution of digital logic for analog circuitry reduces power consumption and eliminates bulky components while maintaining protection functionality.
Solution Approach 2:
The FPGA serves multiple functions: it drives the VDT, samples current values, processes the sampled data through multiple computational steps, determines overcurrent events, and controls the driver circuit. By consolidating these functions into a single programmable device, the system eliminates the need for separate dedicated sense circuitry, reducing overall power consumption and component count.
2Reliability
If traditional overcurrent sense circuitry is used to detect overcurrent events in VDTs, then overcurrent protection is achieved, but the system becomes bulky
Solution Approach 1:
The patent replaces traditional analog overcurrent sense circuitry with a digital processing system implemented in an FPGA. The FPGA samples current values through a sense resistor, processes them using digital algorithms (trimming, squaring, averaging), and determines overcurrent events programmatically. This substitution of digital logic for analog circuitry reduces power consumption and eliminates bulky components while maintaining protection functionality.
Solution Approach 2:
The patent combines the overcurrent detection function with the existing FPGA that already drives the VDT. The same FPGA that generates excitation signals for the VDT also performs current sampling and overcurrent determination. This merging of functions eliminates the need for separate sense circuitry, reducing circuit board space and overall system size.
3Measurement precision
If partial RMS calculation with trimming is used to detect overcurrent events, then detection accuracy is improved, but processing complexity increases
Solution Approach 1:
The patent implements a partial RMS calculation by trimming current values to retain only the most significant bits (e.g., keeping top 6 bits out of 16 bits) before squaring and averaging. This partial processing approach maintains sufficient detection accuracy for overcurrent events while dramatically reducing computational complexity and resource requirements in the FPGA, making the solution practical for embedded implementation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively detects overcurrent events and prevents damage by reducing the need for bulky components, improving power efficiency and reducing the risk of overcurrent-induced damage to VDTs.
Implementation Method 1
A system according to the present invention includes a driver circuit, a sense resistor coupled between the driver circuit and a variable differential transformer (VDT)
Implementation Method 2
The LVDT operation does not require an electrical contact between the moving part (probe or core assembly) and the coil assembly, but instead relies on electromagnetic coupling
Data Source
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AI summary
System and methods for partial RMS calculation of overcurrent in VDT driver circuits are provided. Aspects include sampling, by an FPGA (202), a set of current values from a sense resistor (210), wherein the sense resistor is coupled between a driver circuit (208) and a VDT (212), determining, by the FPGA, an overcurrent event in the driver circuit based on the set of current values, wherein determining the overcurrent event in the driver circuit based on the set of current values includes trimming each current value to create a trimmed current value for each current value, calculating a square value for each trimmed current value and storing the square value in a buffer, calculating a mean for the square values, and determining the overcurrent event based on the mean being outside a predefined range of means, and disabling the driver circuit based on the determination of the overcurrent event.