Vector Add-With-Carry Instruction for Large Integer Multiplication
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Solution Overview
Problem
Existing data processing systems face inefficiencies when handling large integer multiplications, particularly in cryptographic and financial applications, due to the complexity of managing carry information between partial product additions, which can lead to increased overhead and reduced performance.
Innovation Solution
The implementation of a vector add-with-carry instruction that allows direct operation on source data elements without unpacking, using a destination vector register and a carry source vector register to manage carry information, effectively halving the number of data elements but improving overall performance by avoiding unpacking and resizing overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If vector add-with-carry operations use dedicated register structures with reduced element size to accommodate carry information, then carry information can be retained between operations, but the number of data elements that can be processed is reduced and unpacking overhead increases
Solution Approach 1:
The patent utilizes the second data element of each pair as an additional dimension for storing carry information. Instead of reducing the size of the first data element to accommodate carry bits, the invention adds a vertical dimension by using paired elements where the second element stores carry-in and carry-out information. This dimensional approach allows full utilization of lane size while maintaining carry information across operations.
Solution Approach 2:
The patent implements a nested structure where carry information is embedded within the vector register pairs. Each pair of data elements contains both the primary data (first element) and carry information (second element), creating a nested organization where carry data is integrated within the same register structure rather than requiring separate storage. This nesting eliminates the need for unpacking while preserving carry states.
2Reliability
If the number of vector lanes is increased to maintain data element count with reduced element size, then carry information can be preserved, but the complexity of managing partial products increases
Solution Approach 1:
The patent makes the vector register pairs multi-functional by using the first data element for primary data operations and the second data element for carry information. This universal structure serves both data storage and carry management functions within the same register organization, eliminating the need for separate carry register structures and reducing the complexity of managing partial products across multiple specialized registers.
3Reliability
If unpacking and resizing of input vectors is performed to accommodate carry information, then carry bits can be stored, but the overhead of additional instructions increases
Solution Approach 1:
The patent implements self-service by designing the vector register structure to natively support carry information storage without requiring external unpacking or resizing operations. The paired element structure automatically provides carry storage capacity, allowing the system to serve its own carry management needs without additional helper instructions or data transformation steps, thereby eliminating the associated time overhead.
Data Source
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AI summary
Vector add-with-carry instructions are described which use some elements of a destination vector register, or corresponding fields of a predicate register, to provide the carry information corresponding to results of an add-with-carry operation. This is useful for accelerating computations involving multiplications of long integer values.