Vector Atomic Memory Update Fault Handling

Solution Overview

Problem

Vector atomic memory update instructions face challenges in handling fault conditions, as standard fault handling techniques can lead to incorrect results due to already performed updates being repeated, especially when faults occur mid-instruction execution.

Innovation Solution

The processing circuitry suppresses atomic memory update operations for faulting active data elements and any subsequent elements, triggering a fault handling response only when the first active element faults, and stores status information when other active elements fault, allowing safe restart of the instruction without repeating completed updates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If standard fault handling techniques are used for vector atomic memory update instructions, then fault conditions can be detected and handled, but already performed updates may be repeated leading to incorrect results

Engineering Contradiction:
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by checking for fault conditions and suppressing subsequent update operations before they can be executed. When a fault is detected at any position in the vector, the circuitry proactively prevents further atomic memory update operations from occurring, ensuring that no duplicate updates will be performed upon instruction restart. This proactive suppression mechanism resolves the contradiction by maintaining both fault handling capability and data update correctness.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If atomic memory update operations are performed for all active data elements, then processing efficiency is improved, but fault conditions mid-execution cause duplicate updates and data corruption

Engineering Contradiction:
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies segmentation by dividing the vector atomic memory update operations into individual operable units, each corresponding to a specific active data element position. The circuitry processes elements sequentially and can suppress operations for subsequent elements when a fault is detected. This segmentation allows the system to maintain high productivity for successfully processed elements while ensuring data integrity by preventing duplicate updates for elements affected by faults, resolving the contradiction between processing throughput and data integrity.

Inventive Principle:
Principle #1Segmentation

3Ease of operation

If the instruction is restarted after a fault to complete remaining updates, then processing completion is improved, but already performed updates are repeated causing incorrect results

Engineering Contradiction:
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The patent applies feedback by implementing a suppression mechanism that provides information about which atomic memory update operations have already been performed before the instruction is restarted. The circuitry maintains state information indicating which operations were successfully executed prior to fault detection, and this feedback prevents duplicate execution of those same operations upon restart. This feedback mechanism resolves the contradiction by enabling complete instruction execution while maintaining update accuracy through prevention of duplicate operations.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10877833B2Vector atomic memory update instruction
Publication Date: 2020.12.29
  • US10877833B2 patent drawing
  • US10877833B2 patent drawing
  • US10877833B2 patent drawing

AI summary

Processing circuitry (85) supports a vector atomic memory update instruction identifying an address vector, for triggering at least one atomic memory update operation for performing an atomic memory update to a memory location having an address determined based on a corresponding active data element of the address vector. When a fault condition is determined for the address determined using a given faulting active data element of the address vector, atomic memory update operations for that element and any subsequent element in a predetermined sequence are suppressed. If the faulting element is the first active data element in the sequence, a fault handling response is triggered, while otherwise the fault handling response is suppressed and status information is stored indicating which element is the faulting element.