Vector Cumulative Sum Circuit for High-Throughput Filtering

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Solution Overview

Problem

Existing vector processors face throughput issues when computing moving average filters due to the length of input samples, leading to decreased efficiency in high-throughput signal processing operations.

Innovation Solution

A vector cumulative sum circuit and associated instruction are introduced, which enable concurrent input and output operations across multiple registers, allowing for the computation of cumulative sums and facilitating efficient implementation of filtering operations by reducing the number of cycles required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional vector processors are used to compute moving average filters, then the processing can be performed with standard architecture, but the throughput decreases due to the length of input samples requiring sequential processing

Engineering Contradiction:
ImprovethroughputVSAvoidprocessing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The filter computation is divided into two independent stages: (1) computing differences between input samples at相距 positions, and (2) computing cumulative sums of these differences. This segmentation allows parallel execution of multiple difference computations simultaneously, followed by parallel cumulative sum computations, thereby increasing throughput independent of filter length

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The difference values between input samples are pre-computed and stored before the cumulative sum operation. This preliminary action separates the computation into independent phases where difference computation results can be reused across multiple cumulative sum calculations, reducing redundant operations and improving overall processing efficiency

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If the filter size increases, then more input samples can be processed, but the number of cycles required increases proportionally

Engineering Contradiction:
Improvenumber of input samplesVSAvoidnumber of cycles
Core Design Contradiction:
Quantity of substanceVSDuration of action of moving object

Solution Approach 1:

By segmenting the filter computation into difference computation and cumulative sum phases, the architecture can process multiple input samples in parallel during the difference phase, then process the cumulative sums in parallel during the second phase. This allows the number of cycles to remain constant regardless of the number of input samples processed

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The cumulative sum circuit continuously accumulates the difference values across all input samples without interruption. The carry-forward mechanism ensures that each cumulative sum computation builds on the previous one in a continuous pipeline, maximizing resource utilization and maintaining constant throughput independent of filter size

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS11829756B1Vector cumulative sum instruction and circuit for implementing filtering operations
Publication Date: 2023.11.28 APPLE INC
  • US11829756B1 patent drawing
  • US11829756B1 patent drawing
  • US11829756B1 patent drawing

AI summary

A vector cumulative sum circuit can include a set of input registers, a carry-forward data source, a set of output registers, and a network of adder circuits coupling the input registers to the output registers such that the output value in a given output register is the sum of a value provided by the carry-forward data source and the input values from all of the input registers (in logical order) up to (and including) the corresponding input register. The value in the last output register can be carried forward to enable cumulative summing of a larger number of input values. The vector cumulative sum circuit can be implemented in a programmable processor, and a vector cumulative sum instruction can be defined in the instruction set. Using the vector cumulative sum circuit and instruction, filtering operations can be accelerated.