Vector-Quantized DAC Circuit for Mismatch Noise in Oversampling Converters

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Solution Overview

Problem

Conventional digital-to-analog converters in oversampling converters face accuracy and performance issues due to element mismatch, leading to noise voltage and reduced signal quality, which existing data weighted averaging techniques partially address but not fully resolve.

Innovation Solution

A vector quantization digital-to-analog conversion circuit that includes a vector quantization circuit, data weighted averaging circuit, and digital-to-analog conversion sub-circuits, which allocates digital signals into sub-signal paths to increase entropy and reduce noise voltage by averaging and summing analog voltages, thereby improving signal-to-noise ratio.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional data weighted averaging technique is used to improve element mismatch, then conversion accuracy is improved, but noise voltage is generated due to repetition of selected elements

Engineering Contradiction:
Improveconversion accuracyVSAvoidnoise voltage
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent implements dynamic element selection through multiple data weighted averaging sub-circuits that continuously vary which elements are activated. The selector circuit dynamically switches between different combinations of interior elements based on input digital quantities, preventing repetitive activation of the same elements and thereby reducing noise voltage while maintaining conversion accuracy.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent introduces a temporal dimension to element selection by using multiple data weighted averaging sub-circuits operating in different time slots. Instead of repeatedly using the same elements in a single dimension, the system distributes element activation across multiple dimensions (different sub-circuits and time periods), which eliminates noise voltage caused by repetition while preserving accuracy.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Object-generated harmful factors

If additional elements are added to reduce repetition of selected elements, then noise voltage is reduced, but device complexity increases

Engineering Contradiction:
Improvenoise voltageVSAvoidcircuit complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent segments the digital-to-analog conversion function into multiple parallel data weighted averaging sub-circuits, each handling a portion of the input digital quantities. This segmentation allows the system to distribute element activation across multiple sub-circuits, reducing noise voltage without requiring a proportional increase in total elements, as each sub-circuit uses a manageable subset of the interior elements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent makes the interior elements universal by having them serve multiple functions across different data weighted averaging sub-circuits and time slots. The same interior elements are reused across multiple sub-circuits with different activation patterns, eliminating the need to add numerous additional elements while still reducing noise voltage through varied selection patterns.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10707887B2Vector quantization digital-to-analog conversion circuit for oversampling converter
Publication Date: 2020.07.07 SHENZHEN GOODIX TECH CO LTD
  • US10707887B2 patent drawing
  • US10707887B2 patent drawing
  • US10707887B2 patent drawing

AI summary

The present application provides a vector quantization digital-to-analog conversion circuit, for converting a digital signal to an analog signal, characterized by includes a vector quantization circuit, configured to receive the digital signal and generate a vector quantization signal; a data weighted averaging circuit, coupled to the vector quantization circuit, including a plurality of data weighted averaging sub-circuits, configured to receive the vector quantization signal to generate a plurality of data weighted averaging signals; and a digital-to-analog conversion circuit, coupled to the data weighted averaging circuit, including a plurality of digital-to-analog conversion sub-circuits, configured to receive the data weighted averaging signal to generate the analog signal.