Vector Instruction Splitting for Parallel Execution

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Solution Overview

Problem

The efficiency of subsequent vector instructions is low when a fault-only-first vector loading instruction is involved in chaining due to the uncertain execution delay, causing degradation in the effects of chaining as subsequent instructions wait for the completion and updated value of the number of effective elements.

Innovation Solution

An instruction transmitting unit that splits a vector instruction into microinstructions, acquires a number-of-effective-elements index, compares it with a first index of a fault-only-first microinstruction, and transmits the microinstructions for execution only when the index is less than the first index, allowing for parallel execution without waiting for the completion of the previous instruction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If subsequent vector instructions wait for the fault-only-first vector loading instruction to complete and confirm the updated number of effective elements, then execution correctness is ensured, but the operating efficiency of subsequent vector instructions deteriorates

Engineering Contradiction:
Improveexecution correctnessVSAvoidoperating efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the vector instruction execution into multiple microinstructions, each handling a portion of the element range. The instruction transmitting unit divides the original vector instruction into several microinstructions that can be executed in parallel, with each microinstruction processing a specific segment of the data. This segmentation allows subsequent microinstructions to proceed without waiting for the entire fault-only-first instruction to complete, thus improving efficiency while maintaining correctness through segmented validation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary action by having the instruction transmitting unit acquire the number-of-effective-elements index in advance and perform comparison operations before full execution completes. The unit pre-fetches the index value and performs preliminary comparison with the first index to determine whether subsequent microinstructions can proceed, eliminating the need to wait for complete instruction execution while ensuring correctness through pre-validation.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If all subsequent vector instructions wait for the fault-only-first vector loading instruction to confirm update status, then dependency correctness is maintained, but the chaining effect is greatly degraded

Engineering Contradiction:
Improvedependency correctnessVSAvoidwaiting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies segmentation by dividing the dependency validation into segment-specific comparisons. Instead of requiring all subsequent instructions to wait for complete instruction execution, the system segments the validation process into microinstruction-level comparisons. Each subsequent microinstruction compares its element range index with the first index independently, allowing parallel progression while maintaining dependency correctness through segmented validation checks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary action by conducting index comparison operations in advance of full instruction completion. The instruction transmitting unit pre-acquires the number-of-effective-elements index and performs preliminary comparison operations to determine whether subsequent microinstructions can proceed without waiting. This preliminary validation maintains dependency correctness while eliminating unnecessary waiting time.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If the fault-only-first vector loading instruction is executed with uncertain delay, then flexibility in handling access errors is achieved, but the performance bottleneck is created

Engineering Contradiction:
Improveflexibility in handling access errorsVSAvoidexecution speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent resolves the speed-flexibility contradiction by segmenting the execution into multiple microinstructions with deterministic timing characteristics. Each microinstruction processes a specific element range segment, transforming the uncertain delay of the original fault-only-first instruction into a series of predictable, shorter execution segments. This segmentation maintains the adaptability to handle access errors at different positions while improving overall execution speed through parallel processing of segments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system applies preliminary action by pre-acquiring the number-of-effective-elements index and performing comparison operations before the fault-only-first instruction fully completes. This preliminary preparation work is done in advance, allowing subsequent microinstructions to proceed with deterministic timing rather than waiting for uncertain instruction completion, thus improving execution speed while preserving error handling flexibility.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11550572B2Splitting vector instructions into microinstructions for parallel execution based on index comparisons of completed microinstructions
Publication Date: 2023.01.10 C SKY MICROSYST CO LTD
  • US11550572B2 patent drawing
  • US11550572B2 patent drawing
  • US11550572B2 patent drawing

AI summary

This disclosure provides an instruction transmitting unit, an instruction execution unit, and a related apparatus and method. The instruction transmitting unit includes: an instruction splitter adapted to split a to-be-executed vector instruction into microinstructions; a microinstruction index fetcher adapted to acquire a number-of-effective-elements index of the microinstructions resulting from the splitting based on an element range involved in the microinstructions; an index comparison subunit adapted to compare the acquired number-of-effective-elements index with a first index, where the first index is a number-of-effective-elements index of a fault-only-first microinstruction whose processing has not been completed; and a microinstruction transmission controller adapted to transmit the microinstructions resulting from the splitting to a vector execution unit for execution when the number-of-effective-elements index is less than the first index. This disclosure improves operating efficiency of subsequent vector instructions when a fault-only-first vector loading instruction is involved in chaining.