Vector Matrix Multiply Permutation for Streaming DSP Data Access

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Solution Overview

Problem

Digital signal processors face challenges in efficiently processing real-time data streams due to memory bandwidth and scheduling constraints, particularly in applications requiring predictable but non-sequential input data patterns, which can lead to delays in outputting transformed data.

Innovation Solution

A DSP processing core with an integrated autonomous streaming engine that manages multiple data streams, supports vector-based operations, and includes instruction support for computer vision processing, enhancing memory bandwidth and data scheduling through address generation and data formatting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory access is used to load data registers in a data register file, then data processing can be performed, but memory bandwidth constraints and cache miss stalls occur leading to processing delays

Engineering Contradiction:

Improvedata processing throughputVSAvoidcache miss stalls

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The streaming engine pre-fetches and formats data from memory into an input buffer before the DSP processing core needs it. This preliminary action includes generating addresses, formatting data according to specified patterns, and loading data into the input buffer in advance, thereby eliminating cache miss stalls and memory bandwidth constraints during actual processing operations.

Inventive Principle:

Principle #10Preliminary action

2Adaptability or versatility

If non-sequential input data patterns are processed, then real-time data transformation can be achieved, but scheduling constraints and memory access inefficiencies occur

Engineering Contradiction:

Improvedata pattern flexibilityVSAvoidscheduling complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The streaming engine acts as an intermediary between memory and the DSP processing core. It handles the complexity of non-sequential data access patterns, address generation, and formatting operations, thereby simplifying the scheduling burden on the main processor while maintaining flexibility in processing various data patterns including non-sequential and multi-dimensional data structures.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Adaptability or versatility

If multiple data streams are managed manually, then data processing can be performed, but memory bandwidth utilization is inefficient

Engineering Contradiction:

Improvemulti-stream processing capabilityVSAvoidmemory bandwidth utilization

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The streaming engine autonomously manages multiple data streams without requiring manual intervention from the DSP processing core. It self-manages address generation for multiple streams, formats data according to specified patterns, loads data into appropriate buffers, and coordinates memory access operations, thereby improving memory bandwidth utilization through optimized access patterns and eliminating the overhead of manual stream management.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS20260030173A1Permutation for Vector Operations

Publication Date: 2026.01.29 TEXAS INSTRUMENTS INC

AI summary

A method is provided that includes performing, by a processor in response to a vector matrix multiply instruction, multiplying an m×n matrix (A matrix) and a n×p matrix (B matrix) to generate elements of an m×p matrix (R matrix), and storing the elements of the R matrix in a storage location specified by the vector matrix multiply instruction.