Vector Processor Predicate Prediction Micro-Operations

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Solution Overview

Problem

Existing vector processors face challenges in vectorizing loops due to dependencies between iterations, which limits the performance benefits of data-level parallelism and requires extensive manual recoding, making them less adopted for general-purpose applications.

Innovation Solution

A processor that predicts the result of predicate-generating instructions at runtime using prediction micro-operations, allowing for speculative execution of subsequent instructions based on a predicted result vector, and adjusts execution accordingly upon receiving the actual result vector to maintain accuracy and adapt to dynamic conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If vector processors wait for runtime dependency resolution before executing vector instructions, then execution accuracy is maintained, but performance and productivity are reduced due to stalled parallelism exploitation

Engineering Contradiction:
Improveexecution accuracyVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by predicting the outcome of predicate-generating instructions before actual execution. The system generates predicted result vectors in advance using prediction micro-operations, allowing subsequent vector instructions to be executed speculatively without waiting for runtime dependency resolution. This enables parallelism exploitation to proceed while maintaining the option to correct predictions later if actual dependencies differ from predictions.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If vector processors require manual recoding to exploit data-level parallelism, then parallelism can be exploited, but ease of operation and adaptability are reduced

Engineering Contradiction:
Improveparallelism exploitationVSAvoidease of use
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The patent applies self-service by enabling the vector processor to automatically predict and resolve dependencies without requiring manual intervention or recoding. The prediction mechanism autonomously generates predicted result vectors and enables speculative execution, allowing the processor to self-manage the complexity of dependency resolution while maintaining ease of use for programmers.

Inventive Principle:
Principle #25Self-service

3Productivity

If vector processors use speculative execution with prediction micro-operations, then productivity and parallelism exploitation are improved, but device complexity increases

Engineering Contradiction:
ImproveperformanceVSAvoidprocessor complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the prediction mechanism into separate prediction micro-operations that can be independently generated and executed. The system segments the complex dependency resolution task into manageable prediction steps, where each predicate-generating instruction gets its own prediction micro-operation, allowing the complexity to be distributed and managed systematically without overwhelming the processor architecture.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8924693B2Predicting a result for a predicate-generating instruction when processing vector instructions
Publication Date: 2014.12.30 APPLE INC
  • US8924693B2 patent drawing
  • US8924693B2 patent drawing
  • US8924693B2 patent drawing

AI summary

The described embodiments include a processor that executes vector instructions. While dispatching instructions at runtime, the processor encounters a predicate-generating instruction. Upon determining that a result of the predicate-generating instruction is predictable, the processor dispatches a prediction micro-operation associated with the predicate-generating instruction, wherein the prediction micro-operation generates a predicted result vector for the predicate-generating instruction. The processor then executes the prediction micro-operation to generate the predicted result vector. When executing the prediction micro-operation to generate the predicted result vector, if the predicate vector is received, for each element of the predicted result vector for which the predicate vector is active, otherwise, for each element of the predicted result vector, generating the predicted result vector comprises setting the element of the predicted result vector to true.