Vector Predication Instruction Mask Register Repurposing

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Solution Overview

Problem

Existing data processing systems face challenges in efficiently supporting data-dependent control flow for vector operations, as adding predicate registers increases circuit area, power consumption, and complexity, and requires additional instruction encoding, which is not power-efficient and complicates exception handling.

Innovation Solution

A dedicated vector predication instruction is used to set control information based on element comparison operations, allowing selective masking of vector processing for a predetermined number of subsequent instructions without the need for predicate registers, thus maintaining the same instruction encoding for subsequent vector instructions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If predicate registers are added to support data-dependent control flow for vector operations, then the ability to selectively execute vector instructions is improved, but circuit area and device complexity increase

Engineering Contradiction:

Improvedata-dependent control flow capabilityVSAvoidcircuit area

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts the predication control logic from dedicated predicate registers and integrates it into the existing mask register and instruction decoding mechanism. The mask register, already present for other vector masking operations, is repurposed to hold predication control information, eliminating the need for separate predicate registers and reducing circuit area while maintaining data-dependent control flow capability

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The mask register is given multi-functionality by using it to store both traditional vector masking information and predication control information. The instruction decoding logic is also enhanced to universally handle both types of control, allowing the same hardware structure to serve multiple purposes without requiring additional dedicated components

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Measurement precision

If predicate registers are added to support vector predication, then control precision for selective execution is improved, but power consumption increases

Engineering Contradiction:

Improvecontrol precisionVSAvoidpower consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by stationary object

Solution Approach 1:

The existing mask register is repurposed to serve dual functions: traditional vector operation masking and predication control. This eliminates the need for additional dedicated predicate registers that would consume extra power, while maintaining precise element-by-element control capability through the reuse of already-powered hardware resources

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If additional instruction encoding is added for vector predication, then predication functionality is improved, but code density and fetch/decode efficiency deteriorate

Engineering Contradiction:

Improvepredication functionalityVSAvoidfetch/decode efficiency

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent merges the predication instruction format with existing vector instruction formats, allowing predication to be specified using existing instruction encoding fields. The vector predication instruction uses the same opcode structure and operand fields as regular vector instructions, with the predication condition embedded in existing mask register control bits, eliminating the need for separate encoding schemes and maintaining instruction stream efficiency

Inventive Principle:

Principle #5Merging (Combining)

4Adaptability or versatility

If predicate registers are added to support vector predication, then control flexibility is improved, but exception handling complexity increases

Engineering Contradiction:

Improvecontrol flexibilityVSAvoidexception handling complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts predication control from separate predicate registers and integrates it into the existing mask register and instruction decoding pipeline. This integration means that predication state is naturally managed through the same mechanisms that handle other vector control operations, simplifying exception handling by reducing the number of separate state elements that need to be tracked and restored during exceptions

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS10782972B2Vector predication instruction

Publication Date: 2020.09.22 ARM LTD

AI summary

An apparatus comprises processing circuitry (4) and an instruction decoder (6) which supports vector instructions for which multiple lanes of processing are performed on respective data elements of a vector value. In response to a vector predication instruction, the instruction decoder (6) controls the processing circuitry (4) to set control information based on the outcome of a number of element comparison operations each for determining whether a corresponding element passes or fails a test condition. The control information controls processing of a predetermined number of subsequent vector instructions after the vector predication instruction. The predetermined number is hard-wired or identified by the vector predication instruction. For one of the subsequent vector instructions, an operation for a given portion of a given lane of vector processing is masked based on the outcome indicated by the control information for a corresponding data element.