Vector Processing Instructions for Dynamic Loop Parallelism

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Solution Overview

Problem

Existing vector processors face challenges in vectorizing loops due to loop-carried data dependencies and memory-address aliasing, which limits the extent of parallelism that can be exploited at runtime, restricting the adoption of data-level parallelism in general-purpose applications.

Innovation Solution

The introduction of RunningMAC1P/2P and RunningFMAC1P/2P instructions that allow for dynamic vectorization by generating a result vector based on input vectors and a control vector, enabling parallel execution of loop iterations based on runtime conditions, thereby adapting to changing dependencies and maximizing parallelism.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If vector processors are used to exploit data-level parallelism, then processing speed is improved, but loop-carried data dependencies and memory-address aliasing limit the extent of parallelism that can be exploited

Engineering Contradiction:
Improveprocessing speedVSAvoidextent of parallelism
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent introduces dynamic vectorization by allowing the vector length to be determined at runtime based on actual dependency conditions. The system uses control vectors and runtime analysis to adaptively adjust the degree of parallelism, transitioning from static compile-time vectorization to dynamic runtime vectorization that can exploit parallelism when dependencies allow and fall back to sequential execution when they don't.

Inventive Principle:
Principle #15Dynamics

2Productivity

If static vectorization is used at compile time, then parallelism is exploited, but runtime dependencies cannot be fully resolved limiting vectorization extent

Engineering Contradiction:
Improveparallelism exploitationVSAvoidruntime dependency information
Core Design Contradiction:
ProductivityVSLoss of information

Solution Approach 1:

The patent performs preliminary static analysis at compile time to identify potential vectorization opportunities and generate control vectors, but defers the final decision on vector length to runtime when actual dependency information is available. This two-phase approach combines the benefits of both static and dynamic analysis, allowing the system to prepare vectorization strategies in advance while adapting to actual runtime conditions.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If manual re-coding is required to gain parallelism benefits, then data-level parallelism can be exploited, but extensive effort is required reducing adoption

Engineering Contradiction:
Improvedata-level parallelism exploitationVSAvoidcoding effort
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent enables the compiler and runtime system to automatically perform vectorization analysis and code generation without requiring manual intervention. The system self-optimizes by analyzing runtime dependency information and automatically generating appropriate vectorized code, making data-level parallelism accessible to general-purpose applications without extensive manual re-coding effort.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8484443B2Running multiply-accumulate instructions for processing vectors
Publication Date: 2013.07.09 APPLE INC
  • US8484443B2 patent drawing
  • US8484443B2 patent drawing
  • US8484443B2 patent drawing

AI summary

The described embodiments include RunningMAC1P and RunningMAC2P instructions. In the described embodiments, a processor receives a first input vector, a second input vector, a third input vector, and a control vector. Upon executing a RunningMAC1P or a RunningMAC2P instruction, the processor sets a base value equal to a value from an element at a key element position in the first input vector. Next, the processor generates the result vector by, for each element of the result vector to the right of the key element position, setting the element in the result vector equal to a sum of the base value and a result of multiplying a value in each relevant element of the second input vector by a value in a corresponding element of the third input vector, from an element at the key element position to and including a predetermined element in the second input vector.