Vector Processing Unit Instruction Selection

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Solution Overview

Problem

Vector processing apparatuses face inefficiencies in processing multiple data due to lack of perfect parallelism between data, leading to inactivated arithmetic units and performance degradation, while MIMD techniques cause communication overhead due to memory bandwidth limitations.

Innovation Solution

A vector processing apparatus and method that allows parallel processing of multiple instructions by using an instruction memory, an instruction fetch unit, and multiple instruction processing units, where each unit selects a single instruction based on previous arithmetic results and performs arithmetic operations, with predicate information and a mux for conditional instruction selection, minimizing hardware overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If vector processing (SIMD) is used to process multiple data with a single instruction, then processing efficiency is improved for applications with perfect parallelism, but processing efficiency deteriorates when there is no perfect parallelism between data due to inactivated arithmetic units

Engineering Contradiction:

Improveprocessing efficiencyVSAvoidadaptability to different instruction types

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The instruction group is segmented into multiple individual instructions, allowing each arithmetic unit to select and execute only the instructions relevant to its specific data type, rather than forcing all units to execute the same instruction

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Each arithmetic unit dynamically selects instructions from the instruction group based on its previous arithmetic result and data type requirements, enabling adaptive instruction execution that matches the actual parallelism needs of different data

Inventive Principle:

Principle #15Dynamics

2Adaptability or versatility

If MIMD is used to process multiple data with multiple instructions, then adaptability to different data types is improved, but communication overhead increases due to memory bandwidth limitations

Engineering Contradiction:

Improveadaptability to different instruction typesVSAvoidcommunication overhead

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Multiple instructions for different data types are merged into a single instruction group that is broadcast to all arithmetic units simultaneously, eliminating the need for separate memory reads for each instruction while still allowing selective execution

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The instruction group containing multiple potential instructions is prepared and made available to all arithmetic units in advance, so that when execution is needed, units can immediately select from the pre-prepared instructions without additional memory access overhead

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS8566566B2Vector processing of different instructions selected by each unit from multiple instruction group based on instruction predicate and previous result comparison

Publication Date: 2013.10.22 ELECTRONICS & TELECOMM RES INST

AI summary

There is provided a vector processing apparatus and method allowing for the parallel processing of a plurality of different instructions while maintaining vector processing architecture. The vector processing apparatus includes an instruction memory storing a multiple instruction group including one or more instructions; an instruction fetch unit reading the multiple instruction group from the instruction memory; and a plurality of instruction processing units each receiving the multiple instruction group through the instruction fetch unit, selecting a single instruction from the multiple instruction group according to a previous arithmetic result, and performing a arithmetic operation.