Vector Processor Corner Detection via Parallel Comparison
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Solution Overview
Problem
The FAST corner detection algorithm is inefficient on SIMD/VLIW processor architectures due to high overhead from branch delay slots and pixel comparisons, and existing hardware implementations are not programmable or versatile for other applications.
Innovation Solution
A method utilizing a fixed-cost parallel corner detector suitable for vector processors, which computes all possible combinations in parallel, enabling efficient corner detection by generating vectors for comparisons and reducing them to scalar values, and using vector operations to identify corners, with optional non-maximal suppression for improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the FAST algorithm is implemented on SIMD/VLIW processor architectures, then corner detection can be performed, but the number of cycles per pixel is high due to branch delay slots and pixel comparisons
Solution Approach 1:
The patent segments the corner detection process into distinct stages: candidate pixel identification using the Bresenham circle, threshold comparison operations, and corner confirmation. This segmentation allows each stage to be optimized independently for SIMD/VLIW architectures, reducing overall processing cycles per pixel
Solution Approach 2:
The patent employs periodic action through the use of fixed thresholds and structured comparison patterns that repeat across pixel neighborhoods. The Bresenham circle provides a periodic sampling pattern that aligns well with vector processor operations, enabling efficient batch processing of multiple pixels simultaneously
2Productivity
If a hardware implementation is dedicated to the FAST algorithm, then processing efficiency is improved, but the hardware is not programmable or versatile for other applications
Solution Approach 1:
The patent implements a universal corner detection architecture that can perform the FAST algorithm while also supporting other image processing operations. The vector processor design incorporates configurable comparison units and flexible data paths that can be programmed for different algorithms, achieving both high processing efficiency for corner detection and adaptability for other applications
Data Source
AI summary
The present application provides a method of corner detection and an image processing system for detecting corners in an image. The preferred implementation is in software using enabling and reusable hardware features in the underlying vector processor architecture. The advantage of this combined software and programmable processor datapath hardware is that the same hardware used for the FAST algorithm can also be readily applied to a variety of other computational tasks, not limited to image processing.