Vectorization Device for Multi-Loop Aggregate Arithmetic
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Solution Overview
Problem
Existing techniques fail to effectively vectorize programs performing aggregate arithmetic operations in multi-loop processing, where the result of an arithmetic operation on multiple elements of one array serves as an element of another array, due to complex loop dependencies and variable loop lengths.
Innovation Solution
A vectorization device that detects dual-loop configurations with variable inner loop lengths dependent on outer loop variables, determines a fixed loop length based on predetermined criteria, expands array sizes, and sets element values to maintain processing equivalence before and after optimization, allowing for efficient vectorization of aggregate arithmetic operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the inner loop and outer loop are switched to improve vector arithmetic operation efficiency, then the number of vector arithmetic operations is reduced, but the program structure becomes more complex and may not preserve original computational semantics
Solution Approach 1:
The patent changes the loop length parameter from variable to fixed by determining a fixed loop length based on array dimensions and expansion. This allows the inner loop to be unrolled with a predetermined length, transforming the loop structure into a form suitable for vectorization while maintaining computational equivalence through the expansion of array dimensions.
Solution Approach 2:
The patent introduces array dimension expansion to transform the problem. By expanding the second array variable to include additional dimensions, the patent creates a new dimensional space where the loop can be restructured. This dimensional transformation enables the conversion of variable-length loops into fixed-length loops that are compatible with vector arithmetic operations.
2Productivity
If the loop length is fixed to enable vectorization, then vector arithmetic operation efficiency is improved, but the ability to handle variable loop lengths dependent on outer loop variables is lost
Solution Approach 1:
The patent determines a fixed loop length parameter based on the array dimensions and expansion rather than using the variable loop length from the outer loop. This parameter transformation enables the inner loop to execute with a constant length, which is required for vectorization, while the fixed length is derived from the expanded array dimensions that capture the original variable behavior.
Solution Approach 2:
The patent performs preliminary array dimension expansion before the actual computation. By pre-expanding the second array variable to include additional dimensions that account for the variable loop length, the patent prepares the data structure in advance. This preliminary action enables the subsequent fixed-length loop to correctly represent the original variable-length computation.
3Productivity
If array size is expanded to enable fixed loop length processing, then vectorization capability is improved, but memory usage and processing complexity increase
Solution Approach 1:
The patent expands the array by introducing new dimensions rather than simply increasing the size of existing dimensions. The second array variable is expanded to include additional dimensions that correspond to the loop length, creating a multi-dimensional structure. This dimensional expansion allows the array to accommodate the fixed loop length while maintaining a structured organization that facilitates vectorization.
Solution Approach 2:
The patent segments the array into multiple dimensions, where the expanded array variable is divided into segments corresponding to different dimensions. This segmentation allows the array to be organized in a way that separates the loop length information from the data elements, enabling fixed-length processing while maintaining manageable memory structure through dimensional organization.
Data Source
AI summary
Provided is a vectorization device 30 comprising: a unit 31 that detects a configuration in which the inner loop length depends on the outer loop variable, and in which a first array indicating the results of dual-loop processing does not contain the inner loop variable as an index value; an unit 32 that, when the configuration is detected, determines a fixed value as the inner loop length; an unit 33 that expands the array size of a second array used in the calculation of the first array value, and thereby enables dual-loop processing of the inner loop; an unit 34 that sets an element value for an added element of the second array, and thereby, before and after such processing is carried out, enables the results of the dual-loop processing to be made equal; and an unit 35 that updates the software on the basis of such processing results.