Vectorized Sorting Algorithm for AI Chip Data Processing
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Solution Overview
Problem
Artificial intelligence (AI) chips are inefficient for general-purpose algorithms like sorting due to their computational intensity, making it difficult to vectorize conventional sorting algorithms, which limits their performance.
Innovation Solution
A new sorting algorithm based on full vectorization is developed, suitable for AI chips and processors that support vector operations, utilizing local and global digit statistical sequences and prefix sums to efficiently sort data across multiple processing cores.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional sorting algorithms are used on AI chips, then the chips can perform their intended computational tasks, but sorting efficiency deteriorates due to the chips being designed for computationally intensive algorithms rather than general-purpose algorithms
Solution Approach 1:
The patent transforms the sorting algorithm to match the computational parameters and architecture of AI chips. By changing the algorithmic parameters to align with the chip's vector processing capabilities and computational structure, the sorting operation achieves high efficiency on AI chips despite being designed for computationally intensive tasks.
Solution Approach 2:
The sorting algorithm is segmented into multiple processing stages that can be executed in parallel across different computing units of the AI chip. This segmentation allows the general-purpose sorting task to be broken down into specialized sub-tasks that leverage the chip's architectural strengths for computational intensity.
2Power
If AI chips are designed for computationally intensive algorithms, then neural network algorithms run efficiently, but general-purpose algorithms like sorting become inefficient
Solution Approach 1:
The patent creates a universal sorting algorithm that can execute efficiently on AI chips designed for specific computational tasks. The algorithm is designed to be multi-functional, adapting to the chip's neural network optimization while simultaneously achieving high sorting performance, thus enabling the chip to handle both specialized and general-purpose algorithms effectively.
3Speed
If conventional sorting algorithms are vectorized, then processing speed may improve, but the complexity of adapting algorithms to chip architecture increases
Solution Approach 1:
The patent replaces traditional mechanical sorting operations with vectorized computational operations that natively align with AI chip architecture. By substituting conventional algorithmic mechanisms with vector-based computations, the system achieves high processing speed while the complexity is managed through systematic vectorization rather than ad-hoc architectural adaptation.
Data Source
AI summary
A system for sorting data in a single-core processor and a multi-core processor is included in a combined processing apparatus. The combined processing apparatus further includes a general interconnection interface and other processing apparatus. The computing apparatus interacts with other processing apparatus to jointly complete a computing operation specified by a user. The combined processing apparatus further includes a storage apparatus. The storage apparatus is connected to the apparatus and other processing apparatus, respectively. The storage apparatus is configured to store data of the apparatus and other processing apparatus. A solution of the present disclosure improves efficiency of various operations in data processing fields including, for example, an artificial intelligence field, thus reducing overall overheads and costs of the operations.