Motor Vehicle Control Device With Coordination Unit
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Solution Overview
Problem
Modern motor vehicle control devices with multi-core processors face challenges in ensuring real-time capability and maximizing computing power due to access collisions and unpredictable execution times, which are exacerbated by the need for large safety margins and complex data exchange processes.
Innovation Solution
A control device with a coordination unit that manages data access and exchange between processor cores and global memory, preventing access collisions by isolating each processor core to its own local memory and handling data transfer independently, similar to a cache system, thereby simplifying data exchange and reducing execution times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If processor cores access global memory directly, then data exchange between cores is possible, but access collisions occur and execution time becomes unpredictable
Solution Approach 1:
A coordination unit is introduced as an intermediary between processor cores and global memory. The coordination unit manages all memory access requests, serializing them to prevent collisions. Each core communicates through this mediator, which handles data transfer between local and global memory, eliminating direct core-to-global-memory access paths that cause collisions.
Solution Approach 2:
The memory system is segmented into local memories attached to each processor core and a global memory. The coordination unit segments the access control function, dedicating it solely to memory management. This segmentation isolates cores from direct global memory access while maintaining data exchange capability through the coordinated interface.
2Reliability
If safety margins are increased to account for access collisions, then real-time capability is ensured, but usable computing power is reduced
Solution Approach 1:
The coordination unit serves as a dedicated intermediary that handles all memory access coordination, removing the burden from processor cores. This allows execution time to be calculated precisely based on known coordination unit performance characteristics, eliminating the need for conservative safety margins and maximizing usable computing power while ensuring real-time capability.
3Adaptability or versatility
If processor cores have access to multiple memory resources, then data exchange flexibility is improved, but access collision probability increases
Solution Approach 1:
The coordination unit acts as a mediator that manages all access requests to global memory and local memories. Processor cores maintain flexible access patterns through the coordination unit, which serializes and manages resource allocation, eliminating direct conflicts while preserving access flexibility.
Solution Approach 2:
Memory resources are segmented into private local memories and shared global memory, with the coordination unit segmenting the access control function. This segmentation allows cores to access multiple memory resources flexibly while the coordination unit prevents collisions by managing access sequences.
Data Source
Figure 1
AI summary
The invention relates to a control device (10) for a motor vehicle, wherein the control device (10) comprises at least two processor cores (110, 120, 130) and a global memory (300), wherein each processor core (110, 120, 130) comprises in each case a local memory (112), and wherein each processor core is set up to access only its own local memory and is set up to access neither the local memories in the other processor cores nor the global memory (300), wherein a coordination unit (200) is set up to read data from the global memory (300) of the control device (10) and to write said data to the local memories (112) in the individual processor cores (110, 120, 130) and to read data from the local memories (112) in the individual processor cores (110, 120, 130) and to write said data to the global memory (300) and/or to the local memories in the other processor cores.