Vented Compliant Terminal Mountings for Semiconductor Warpage

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Solution Overview

Problem

Existing semiconductor chip packages face challenges with warpage due to differential expansion of compliant layers and contamination issues with open-celled foams, leading to reliability problems and inadequate compliance for terminal movement.

Innovation Solution

A compliant structure with cavities and channels overlying the chip surface, where terminals are positioned adjacent to cavities and vents are opened to the exterior, allowing for greater compliance and reduced pressure changes, while preventing contamination by keeping plating solutions and etchants out.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a compliant layer is formed on the front surface of a wafer to provide terminal movability, then terminal compliance and engagement capability are improved, but warpage of the wafer occurs due to differential expansion and contraction

Engineering Contradiction:
Improveterminal movabilityVSAvoidwafer warpage
Core Design Contradiction:
Adaptability or versatilityVSShape

Solution Approach 1:

The compliant layer is segmented into a mosaic of discrete compliant elements rather than being continuous. This segmentation allows each element to independently accommodate thermal expansion and contraction without causing overall wafer warpage, while still providing the necessary terminal movability and compliance for engagement with testing devices and circuit panels.

Inventive Principle:
Principle #1Segmentation

2Shape

If the thickness of the compliant layer is reduced to minimize warpage, then wafer shape stability is improved, but terminal movability and compliance are insufficient

Engineering Contradiction:
Improvewafer shape stabilityVSAvoidterminal compliance
Core Design Contradiction:
ShapeVSAdaptability or versatility

Solution Approach 1:

The compliant elements are designed with specific local geometries (such as domes, bumps, or pillars) that concentrate compliance in the vertical direction while maintaining overall wafer stability. Each compliant element's shape is optimized to provide maximum Z-direction movement for terminal engagement while minimizing lateral expansion that would cause warpage.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If open-celled foam is used as a compliant material to provide terminal movement, then terminal compliance is improved, but contamination occurs from plating solutions and etchants infiltrating the foam

Engineering Contradiction:
Improveterminal complianceVSAvoidcontamination from plating solutions and etchants
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The harmful open-celled foam structure is extracted and replaced with solid compliant elements that have closed or sealed structures. This eliminates the porous pathways that allow plating solutions and etchants to infiltrate and contaminate the underlying chip and circuitry, while still providing the necessary compliance for terminal movement through the solid element geometry.

Inventive Principle:
Principle #2Taking out (Extraction)

4Adaptability or versatility

If a continuous compliant layer is used to facilitate terminal movement, then terminal engagement capability is improved, but manufacturing complexity increases due to handling and placement of bare chips

Engineering Contradiction:
Improveterminal engagement capabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The compliant layer is integrated directly into the wafer structure during wafer-scale processing, merging the chip fabrication and package assembly into a single unified process. This eliminates the need for separate handling and placement of bare chips, reducing manufacturing complexity while maintaining terminal engagement capability through the integrated compliant elements.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides enhanced compliance and reliability by allowing terminals to move in the Z-direction without compressing a solid layer, maintaining atmospheric pressure within cavities, and preventing contamination, thus improving the handling and testing of semiconductor chips.

Implementation Method 1

Movability of the terminals with respect to the chip can compensate for differential thermal expansion between the chip and the circuit panel during manufacture, during service, or both

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

maintaining atmospheric pressure within cavities

Methodology Applied
Scientific EffectPressure equilibrium: Pascal's Law

Implementation Method 3

preventing contamination by keeping plating solutions and etchants out

Methodology Applied
Scientific EffectPhysical barrier: Physical Containment

Data Source

PatentUS7521276B2Compliant terminal mountings with vented spaces and methods
Publication Date: 2009.04.21 ADEIA SEMICONDUCTOR SOLUTIONS LLC
  • US7521276B2 patent drawing
  • US7521276B2 patent drawing
  • US7521276B2 patent drawing

AI summary

A method of making chip assemblies includes providing an in-process assembly including a semiconductor wafer, a wafer compliant structure overlying a front surface of the wafer and cavities, and terminals carried on the compliant structure adjacent the cavities and electrically connected to the wafer, the cavities being substantially sealed. The method includes subdividing the in-process assembly to form individual chip assemblies, each including one or more chip regions of the wafer, a portion of the compliant structure and the terminals carried on the portion, and opening vents communicating with said cavities after said providing step.