Electronic Device Display Method for Verification Expression Input
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Solution Overview
Problem
Existing electronic devices with verification functions, such as scientific calculators, require users to manually re-input expressions after verification, which complicates the usability and efficiency of the verification process, especially for expressions with equality or inequality signs.
Innovation Solution
An electronic device with a processor that allows easy entry of expressions by displaying the right side member of a verified expression as the left side member for the next verification, enhancing usability by automating the process and simplifying user input operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If users manually re-input expressions after verification, then verification accuracy is maintained, but operation complexity increases and efficiency decreases
Solution Approach 1:
The system performs preliminary action by automatically preparing the right-side expression as the left-side expression for the next verification step, so users don't need to manually re-input expressions. This advance preparation resolves the contradiction by maintaining verification accuracy while eliminating repetitive manual input.
Solution Approach 2:
The verification system performs self-service by automatically managing the expression sequence itself. After verifying an expression, the system automatically reuses the right-side result as the next left-side expression, making the system serve itself rather than requiring continuous manual intervention from users.
2Measurement precision
If users manually re-input expressions after verification, then verification precision is maintained, but time consumption increases
Solution Approach 1:
The system implements continuity of useful action by eliminating the interruption between verification steps. Instead of stopping for manual re-input, the system continuously processes expressions by automatically transitioning from one verification to the next using the right-side result as the next left-side expression, thereby maintaining accuracy while reducing time loss.
Solution Approach 2:
By preliminarily preparing the next expression to be verified (the right-side result) before the current verification completes, the system ensures continuous operation without time-wasting interruptions, thus maintaining verification precision while minimizing time consumption.
3Ease of operation
If the system displays the right side member as the left side member automatically, then ease of operation improves, but device complexity increases
Solution Approach 1:
The system achieves self-service by automatically managing the expression sequence without requiring complex external control mechanisms. The processor itself handles the reusing of right-side results as left-side expressions, simplifying user interaction while containing complexity within the system's core processing logic.
Solution Approach 2:
The system merges the verification function with the expression generation function. Instead of separate processes for verification and next-expression preparation, the system combines them so that verification automatically leads to the next expression display, improving ease of operation while managing complexity through functional integration.
Data Source
AI summary
An electronic device includes a display unit and a processor. The processor performs an input process to receive an input of a first mathematical expression including a left side member, an equality sign or inequality sign, and a right side member expressed in this order; a first mathematical expression display process to display, on the display unit, the input first mathematical expression; a verification process to verify whether the input first mathematical expression is true or false; and a second mathematical expression display process to display, on the display unit, the right side member of the verified first mathematical expression as a left side member of a second mathematical expression to be newly verified, if the first mathematical expression is determined to be true as a result of verification by the verification process.