Deep Learning Verification Tuning for Rare Coverage and Bug Detection
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Solution Overview
Problem
Design verification of integrated circuits faces challenges in achieving complete functional coverage, particularly for rare corner cases, due to the complexity and rarity of functional coverage statements, which can lead to delayed verification and increased chances of taping out designs with undiscovered bugs.
Innovation Solution
Utilizing deep reinforcement learning (RL) algorithms to generate targeted stimuli by adjusting verification parameters, responses, and design configurations to increase the likelihood of hitting rare functional coverage statements and uncover bugs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional design verification methods are used, then the verification process is simple to implement, but the functional coverage is incomplete and rare corner cases are missed
Solution Approach 1:
A machine learning model is introduced as an intermediary between the verification engineer and the simulation environment. The model learns from historical simulation data and automatically generates targeted test stimuli that would otherwise require extensive manual effort to create, thereby improving functional coverage without proportionally increasing verification complexity
Solution Approach 2:
The system dynamically adjusts simulation parameters based on learned patterns from functional coverage data. By changing simulation parameters such as input signal sequences, timing conditions, and stimulus patterns, the system targets rare corner cases that traditional fixed-parameter simulations would miss
2Reliability
If more simulation runs are conducted to improve coverage, then bug detection capability improves, but the verification time increases
Solution Approach 1:
The machine learning model performs preliminary analysis of functional coverage data before executing simulation runs. By pre-identifying which test scenarios are most likely to reveal bugs based on learned patterns, the system prioritizes simulation runs that maximize bug detection probability while minimizing total verification time
Solution Approach 2:
The system implements a feedback loop where simulation results are continuously fed back to the machine learning model. The model learns from each simulation outcome and adjusts subsequent test generation strategies, improving bug detection efficiency over time without requiring a linear increase in simulation runs
3Reliability
If manual stimulus generation is used, then the verification process is controllable, but the ability to hit rare functional coverage statements is reduced
Solution Approach 1:
The machine learning model enables the verification system to serve itself by automatically generating test stimuli based on learned patterns from functional coverage data. This self-service capability allows the system to autonomously identify and target rare corner cases without requiring manual intervention for each test scenario, while still maintaining operational controllability through configurable parameters
Data Source
AI summary
Methods, systems, and devices for tuning a set of simulation parameters associated with a design verification environment are described that include: simulating a circuit design according to a set of simulation runs; providing, to a machine learning network, an indication of functional coverage results associated with simulating the circuit design according to the set of simulation runs; receiving an output in response to the machine learning network processing the functional coverage results; and simulating the circuit design based on a recommended set of simulation parameters. The output includes: an indication of a near miss event associated with the functional coverage results; and the recommended set of simulation parameters. Simulating the circuit design based on the recommended set of simulation parameters includes generating a set of component signals associated with triggering the near miss event.