Versioned Memory Page Access During Erase Operations
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Solution Overview
Problem
Memory systems face delays in accessing valid data pages due to erase operations or busy memory channels, leading to inefficiencies in data retrieval, especially when only a portion of the page is requested.
Innovation Solution
Implementing a scheme to access requested data from an invalid version of the page if the valid version is not readily accessible, using tracking logic to identify valid data within invalid pages, and utilizing invalid page mapping data structures to manage multiple versions of data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the system waits for erase operations to complete before accessing valid data pages, then data integrity is maintained, but access latency increases
Solution Approach 1:
The system performs preliminary validation by setting valid bit indicators for each cache line in the invalid page version before the erase operation completes. This allows the system to pre-identify which data portions remain valid and can be immediately accessed without waiting for the erase operation to finish, thus reducing access latency while maintaining data integrity through the valid bit verification mechanism.
Solution Approach 2:
The patent introduces an intermediary invalid page data structure that acts as a buffer between the invalid page and the cache. This intermediary structure contains valid bit indicators that mediate access decisions - allowing the system to quickly check validity status without directly accessing the potentially being-erased page, thus reducing latency while preserving data integrity through the intermediary validation layer.
2Use of energy by moving object
If the system accesses only a portion of a data page, then power consumption is reduced, but access complexity increases
Solution Approach 1:
The patent segments the data page into individual cache lines, each with its own valid bit indicator. This segmentation allows the system to access only the specific cache lines that contain the requested data rather than the entire page. The valid bit indicators enable quick identification of which segmented cache lines are valid, reducing power consumption by avoiding unnecessary accesses while the segmentation structure itself manages the access complexity.
3Adaptability or versatility
If multiple versions of pages are stored, then data retrieval flexibility improves, but memory space requirements increase
Solution Approach 1:
The system stores multiple versions of pages but only maintains valid bit indicators for cache lines that actually contain valid data in the invalid page version. This partial action approach means that not all cache lines in an invalid page version require validation tracking - only those that may contain valid data. This reduces the overhead of maintaining multiple version metadata while preserving the flexibility to retrieve data from any valid version.
Data Source
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AI summary
An apparatus may include at least one memory, and at least one processor configured to determine an accessibility of a first version of a page, wherein the first version of the page may be stored in the at least one memory, and perform, based on the accessibility of the first version of the page, an access of at least a portion of a second version of the page, wherein the second version of the page is stored in the at least one memory. The accessibility of the first version of the page may be based on an erase operation of the first version of the page. The access of the at least a portion of the second version of the page may include an access of a cache line of the second version of the page.