Vertex Core Reset Scanner for Scalable Primitive Processing

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Solution Overview

Problem

Existing graphics systems process rendering primitives serially, leading to inefficient processing of complex scenes and unsuitable input index streams for scalable primitive generation units, resulting in slow rendering and limited primitive rates.

Innovation Solution

The implementation of a vertex core with a reset scanner that processes incoming indices to remove reset indices and partial primitives, transforming input indices into a format suitable for scalable primitive generators, allowing multiple primitives to be processed simultaneously and increasing system throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If primitives are processed serially in conventional graphics systems, then device complexity is reduced, but productivity decreases significantly

Engineering Contradiction:
Improveprimitive processing rateVSAvoidprocessing system complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The input stream is segmented into multiple sub-streams by the reset scanner, with each sub-stream fed to a separate primitive generation unit. This allows parallel processing of multiple primitives simultaneously, increasing throughput from 1 primitive per clock to multiple primitives per clock while maintaining manageable complexity in each individual processing unit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system transitions from single-dimensional serial processing to multi-dimensional parallel processing by introducing multiple primitive generation units operating simultaneously. The reset scanner distributes work across these units in parallel, effectively adding a temporal dimension to the processing architecture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If input index streams are used directly in conventional systems, then device complexity is minimized, but adaptability to scalable primitive generators is poor

Engineering Contradiction:
Improvecompatibility with scalable primitive generatorsVSAvoidindex stream processing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The reset scanner performs preliminary processing on the input index stream before it reaches the primitive generation units. It removes reset indices and partial primitives in advance, transforming the data into a format that is directly compatible with scalable primitive generators, thereby improving adaptability without complicating the downstream units.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The reset scanner acts as an intermediary component between the input assembler and the primitive generation units. It mediates the data format transformation, converting conventional input index streams into a format suitable for scalable primitive generators, thereby enabling compatibility without requiring changes to the existing primitive generation architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If multiple primitive generation units are deployed to increase throughput, then productivity increases, but device complexity and processing difficulty increase

Engineering Contradiction:
Improveprimitives per clockVSAvoidprocessing complexity
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The reset scanner extracts and removes problematic elements (reset indices and partial primitives) from the input stream before distribution to multiple primitive generation units. This purification of the input data simplifies the processing logic in each unit, making it easier to detect and measure processing states while maintaining high throughput.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS9123153B2Scalable multi-primitive system
Publication Date: 2015.09.01 ADVANCED MICRO DEVICES INC
  • US9123153B2 patent drawing
  • US9123153B2 patent drawing
  • US9123153B2 patent drawing

AI summary

Disclosed herein is a vertex core. The vertex core includes a reset scanner configured to remove reset indices and partial primitives in an input stream and resolve draw calls into sub-draw calls at reset index boundaries; and provide the resolved sub-draw calls to a plurality of downstream vertex grouper tessellators.