Vertex-Based OPC for Disk-Shaped Lithography Openings
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Solution Overview
Problem
Optical lithography processes face challenges in transferring layout patterns from photo masks to wafers due to resist pattern defects, particularly in openings, corners, and connection lines, which are not adequately addressed by existing optical proximity correction (OPC) methods.
Innovation Solution
The implementation of vertex-based OPC enhancements, which modify the vertices of polygons representing layout patterns to approximate disk and partial disk shapes, and the inclusion of sub-resolution assist features to compensate for imaging distortions and improve imaging effects, thereby producing accurate resist patterns on wafers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional OPC methods are used to modify layout patterns, then some resist pattern defects are reduced, but defects in openings, corners, and connection lines remain inadequate
Solution Approach 1:
The patent applies different correction strategies to different geometric features: vertex-based correction for openings (making them disk-shaped), corner rounding for 90-degree corners, and length extension for connection lines. This localized approach ensures each feature type receives the specific correction it needs, improving overall reliability without compromising manufacturing precision
Solution Approach 2:
The patent performs preliminary corrections on the layout pattern before lithography by anticipating and compensating for known imaging distortions. Vertex positions are adjusted in advance to account for the circular point spread function, connection lines are extended to compensate for rounding, and corners are pre-rounded to prevent defects, ensuring accurate final patterns
2Manufacturing precision
If vertex-based OPC corrections are applied to all features, then imaging accuracy improves, but computational complexity and processing time increase
Solution Approach 1:
The patent segments the layout pattern into distinct feature types (openings, corners, connection lines) and applies appropriate corrections only to each segment. This avoids unnecessary computational overhead on features that don't require vertex-based correction, reducing processing complexity while maintaining high manufacturing precision for critical features
Solution Approach 2:
The patent applies vertex-based corrections selectively rather than universally. By identifying and correcting only the most critical features (openings, corners, connection lines) that have the greatest impact on resist pattern quality, the method achieves high manufacturing precision without the excessive computational complexity of correcting every feature
3Manufacturing precision
If sub-resolution assist features are added to compensate for imaging distortions, then imaging effects improve, but layout pattern complexity increases
Solution Approach 1:
The patent introduces sub-resolution assist features as intermediary elements that mediate between the intended layout pattern and the actual imaged pattern. These features act as optical mediators that compensate for imaging distortions through diffraction effects, improving manufacturing precision while adding minimal complexity since they are sub-resolution and don't require additional fabrication steps
Data Source
AI summary
A method of enhancing a layout pattern includes determining a target layout pattern comprising a disk shape associated with a hole. The method includes defining a polygon having a plurality of vertices on the disk shape. The plurality of vertices coincide with a boundary of the disk shape and the polygon is an initial layout pattern of the hole. The method includes performing an iterative correction of the initial layout pattern. The iterative correction includes projecting the layout pattern of the hole onto a substrate, determining an error between the target layout pattern and the projected layout pattern, and adjusting the layout pattern by moving the vertices of the polygon to generate a next iteration of the layout pattern. The method includes continuing the adjusting, projecting, and determining until a criterion is satisfied and a final iteration of the layout pattern of the hole is generated.


