Vertex Shader Buffer Reuse for Instruction Efficiency

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Solution Overview

Problem

Conventional graphics processing designs that split vertex shading operations into two stages are inefficient due to the need for repeated execution of instructions, as the first stage's instructions must be executed again by the second stage, leading to increased computational load.

Innovation Solution

A graphics processing circuit and method that includes a first vertex shader generating coordinate values and intermediate values, which are stored in a buffer, and a second vertex shader that reuses these values to reduce the number of instructions executed, thereby improving efficiency by skipping redundant calculations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the vertex shading operation is divided into two vertex shading stages, then the first vertex shading stage can skip the execution of the third instructions, but the first instructions executed by the first vertex shading stage need to be executed by the second vertex shading stage again, resulting in inefficient instruction execution

Engineering Contradiction:
Improveinstruction execution efficiencyVSAvoidtime for re-executing instructions
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The first vertex shading stage performs preliminary computation of vertex coordinates and intermediate values before the second stage. These pre-computed values are stored in a buffer so that the second vertex shading stage can directly reuse them without re-executing the same instructions, thereby eliminating redundant computation time

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The output results (vertex coordinates and intermediate values) from the first vertex shading stage are copied to a buffer. The second vertex shading stage then reads and reuses these copied values instead of recalculating them, significantly reducing the instruction execution time in the second stage

Inventive Principle:
Principle #26Copying

Data Source

PatentUS9424686B2Graphics processing circuit having second vertex shader configured to reuse output of first vertex shader and/or process repacked vertex thread group and related graphics processing method thereof
Publication Date: 2016.08.23 XUESHAN TECH INC
  • US9424686B2 patent drawing
  • US9424686B2 patent drawing
  • US9424686B2 patent drawing

AI summary

A graphics processing circuit includes a buffer, a first vertex shader, and a second vertex shader. The first vertex shader generates at least coordinate values of a plurality of vertices to the buffer. The second vertex shader reads at least a portion of buffered coordinate values from the buffer, and reuses at least the portion of the buffered coordinate values to generate a value of at least one user-defined variable.