Vertical 2D Gas Channel Structure for High-Density VFETs
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Solution Overview
Problem
Conventional semiconductor devices are limited by their two-dimensional (2D) fabrication techniques, which restrict transistor density and efficiency, necessitating the development of three-dimensional (3D) integration methods to increase density in volume rather than area.
Innovation Solution
The implementation of vertical field-effect transistors (VFETs) with 2D gas channels formed at interfaces between various 2D materials, such as lanthanum aluminate and strontium titanate, to enhance transistor density and performance by stacking transistors vertically, utilizing high-k gate dielectrics and specific metal layers to improve conductivity and mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If two-dimensional fabrication techniques are used, then manufacturing simplicity is maintained, but transistor density is limited
Solution Approach 1:
The patent transitions from two-dimensional planar fabrication to three-dimensional vertical stacking by forming transistor channels in the vertical direction. Multiple transistor layers are stacked above each other, utilizing the third dimension (height) to increase transistor density without requiring proportional increases in chip area. This dimensional change allows simultaneous achievement of higher density while maintaining compatibility with existing fabrication processes.
2Quantity of substance
If vertical stacking is implemented, then transistor density in volume increases, but manufacturing precision requirements increase
Solution Approach 1:
The vertical stack is divided into discrete transistor layers, each with clearly defined source, drain, and gate regions. The channel formation process is segmented into sequential steps where 2D materials are deposited and processed in controlled layers. This segmentation allows each layer to be manufactured and characterized independently, reducing the cumulative impact of alignment errors and enabling better control over manufacturing precision.
Solution Approach 2:
Dielectric materials serve as intermediary layers between adjacent transistor layers in the vertical stack. These intermediary dielectric layers provide electrical isolation and mechanical support, enabling precise positioning of conductive layers while maintaining manufacturing feasibility. The intermediary structures facilitate alignment by providing reference planes and spacing control.
3Reliability
If 2D materials are used for channel formation, then electrical mobility is improved, but material deposition complexity increases
Solution Approach 1:
The patent utilizes phase transitions and crystallization parameters to transform amorphous or poorly crystalline 2D material deposits into high-quality crystalline channels with superior electrical mobility. By controlling deposition temperature, annealing conditions, and material composition parameters, the process achieves high mobility while using standard deposition techniques rather than requiring exotic material synthesis methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly increases transistor density and improves electrical properties by enabling higher dimensionality and closer proximity of devices, leading to enhanced performance and efficiency in semiconductor devices.
Implementation Method 1
The channel structure can include a 2D gas formed at an interface between the first 2D material and the second 2D material. The 2D gas can extend from the first source metal to the first drain metal.
Implementation Method 2
the semiconductor device can include a high-k gate dielectric interposed between the third portion of the channel structure and the gate metal
Data Source
AI summary
Systems and methods for manufacturing two-dimensional (2D) gas channel for vertical transistors. The system can include a semiconductor device. The semiconductor device can include a channel structure surrounding a first dielectric core. The channel structure can include a first two-dimensional (2D) material and a second 2D material. The semiconductor device can include a source metal surrounding a first portion of the channel structure. The semiconductor device can include a drain metal surrounding a second portion of the channel structure. The semiconductor device can include a gate metal surrounding a third portion of the channel structure.