Vertical Airgap Semiconductor Structures for Linearity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Field-effect transistors fabricated on bulk substrates exhibit poor linearity and intermodulation properties due to non-linear electric fields, while semiconductor-on-insulator substrates are costly and not universally adopted.
Innovation Solution
A structure with a vertical airgap is formed between a substrate and a semiconductor device region, using epitaxially grown layers and selective etching to create openings and an airgap, reducing capacitive coupling and enhancing device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If field-effect transistors are fabricated on bulk substrates, then manufacturing cost is reduced, but linearity and intermodulation properties deteriorate due to non-linear electric fields
Solution Approach 1:
The substrate system is segmented into distinct functional regions: a bulk substrate providing mechanical support and cost advantages, and a suspended device region with an airgap providing improved electrical performance. This segmentation allows each region to fulfill its specific function optimally without compromise.
Solution Approach 2:
The airgap is formed by removing material (silicon layer) from beneath the device region, extracting the problematic substrate interaction and replacing it with an air medium. This extraction eliminates the non-linear electric field effects while preserving the bulk substrate's manufacturing advantages.
2Reliability
If semiconductor-on-insulator substrates are used, then linearity and intermodulation properties are improved, but manufacturing cost increases
Solution Approach 1:
The airgap structure provides localized electrical isolation and improved electric field linearity only in the critical device region, while the rest of the substrate can remain as cost-effective bulk substrate. This local optimization delivers SOI-like performance where needed without the global cost penalty.
3Reliability
If a vertical airgap is formed between substrate and device region, then capacitive coupling is reduced and linearity is improved, but device complexity increases
Solution Approach 1:
The structure employs asymmetric design with the airgap positioned only beneath the active device region while leaving other areas as conventional bulk substrate. This asymmetric configuration achieves the desired electrical performance improvement with minimal additional structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The airgap structure improves linearity and intermodulation properties while being cost-effective, allowing for higher substrate resistivities without affecting device operation, and reduces leakage current.
Implementation Method 1
etching the second semiconductor layer through the openings and selective to the substrate and the first semiconductor layer so as to form an airgap
Implementation Method 2
The airgap structure improves linearity and intermodulation properties while being cost-effective, allowing for higher substrate resistivities without affecting device operation, and reduces leakage current
Data Source
AI summary
Structures that include an airgap and methods for forming a structure that includes an airgap. A layer stack is epitaxially grown on a substrate and includes a first semiconductor layer and a second semiconductor layer on a substrate. A plurality of openings are formed that extend through a device region of the first semiconductor layer to the second semiconductor layer. The second semiconductor layer is etched through the openings and selective to the substrate and the first semiconductor layer so as to form an airgap that is arranged in a vertical direction between the substrate and the device region. A device structure is formed in the device region of the first semiconductor layer.


