Vertical Semiconductor Barrier Layers for Oxidation Control
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Solution Overview
Problem
Vertical semiconductor devices, such as vertical gate-all-around transistors, face challenges in process integration due to vulnerability to oxidation, which affects nanowire, source/drain, and high-K dielectrics, leading to changes in critical dimensions and equivalent oxide thickness.
Innovation Solution
The implementation of multiple barrier layers made of materials like SiN, SiCN, or SiCON, which isolate the source, drain, gate, and high-K dielectrics from oxidation, and serve as a hard mask during contact etching, reducing oxidation effects and enhancing the stability of the semiconductor device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If vertical gate-all-around transistors are fabricated without barrier layers, then the device structure can be simpler and manufacturing can be easier, but oxidation occurs during processing leading to changes in critical dimensions and equivalent oxide thickness
Solution Approach 1:
Barrier layers are formed over the nanowire, source, drain, and high-K dielectrics before oxidation-prone processing steps occur. This preliminary protective action prevents oxidation during subsequent manufacturing steps, maintaining critical dimensions and equivalent oxide thickness while allowing the device to proceed through standard fabrication processes.
Solution Approach 2:
The barrier layers act as intermediary protective layers between the sensitive device components (nanowire, source, drain, high-K dielectrics) and the oxidizing environment during processing. These intermediary layers prevent direct contact between oxygen and the vulnerable surfaces, thereby preventing oxidation without requiring fundamental changes to the manufacturing process.
2Manufacturing precision
If multiple barrier layers are added to protect against oxidation, then manufacturing precision and device stability are improved, but device complexity increases
Solution Approach 1:
The protective barrier system is segmented into multiple distinct layers (first barrier layer, second barrier layer) with different materials and positions. The first barrier layer is formed over the nanowire, source, and drain, while the second barrier layer is formed over the high-K dielectric. This segmentation allows each layer to be optimized for its specific protective function while maintaining overall manufacturing precision.
Solution Approach 2:
Different barrier layers are applied to different regions of the device based on their specific oxidation vulnerabilities. The first barrier layer protects the silicon-based components (nanowire, source, drain), while the second barrier layer protects the high-K dielectric. This local quality approach ensures that each region receives appropriate protection tailored to its material properties and oxidation risks.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of barrier layers effectively decreases nanowire oxidation, maintains critical dimensions, and prevents oxidation of high-K dielectrics and metal gates during annealing processes, thereby improving the reliability and performance of vertical semiconductor devices.
Implementation Method 1
a barrier layer over the gate and the drain of the vertical structure... The barrier layers isolate a source, a drain, a gate including high-K layer and a metal gate from oxidation by other processes
Data Source
AI summary
According to an exemplary embodiment, a method of forming a vertical structure with at least two barrier layers is provided. The method includes the following operations: providing a substrate; providing a vertical structure over the substrate; providing a first barrier layer over a source, a channel, and a drain of the vertical structure; and providing a second barrier layer over a gate and the drain of the vertical structure.