Vertical Bipolar Transistor Array for Scaled RRAM Bitcells
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Solution Overview
Problem
The scalability of resistive random-access memory devices is restricted by the minimum voltage and drive current requirements imposed on field-effect transistors, limiting the ability to shrink bitcell dimensions.
Innovation Solution
A structure comprising bipolar junction transistors with a vertical arrangement of base layers extending through a dielectric layer, connected by a semiconductor layer, allowing for the elimination of field-effect transistors as access transistors and enabling compact bitcell dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If field-effect transistors are used as access transistors in resistive random-access memory devices, then the devices can operate reliably with established technology, but the minimum voltage and drive current requirements restrict the ability to shrink bitcell dimensions
Solution Approach 1:
The patent changes the transistor type from field-effect to bipolar junction transistor, fundamentally altering the electrical parameters (voltage and current characteristics) to enable smaller bitcell dimensions while maintaining reliable operation. The bipolar transistor's superior drive current capability and lower voltage requirements allow for scaling down without sacrificing reliability.
Solution Approach 2:
The patent substitutes field-effect transistors with bipolar junction transistors in the access transistor position, replacing one transistor mechanism with another that has different electrical characteristics. This substitution enables the bitcell to meet the voltage and current requirements for reliable operation at reduced dimensions.
2Productivity
If field-effect transistors are used as access transistors, then the structure can be implemented with current manufacturing processes, but the drive current requirements limit further scaling of the device
Solution Approach 1:
The patent changes the transistor type to bipolar, which fundamentally alters the power and current parameters. Bipolar transistors provide superior drive current capability compared to field-effect transistors, enabling the bitcell to scale down further while maintaining the necessary drive current for reliable operation.
3Length of moving object
If vertical bipolar junction transistors with base layers extending through dielectric layer are implemented, then downward scaling is enabled, but the manufacturing complexity increases
Solution Approach 1:
The patent employs a vertical transistor architecture where the base layer extends through the dielectric layer in the vertical dimension. This three-dimensional structure enables compact lateral dimensions (downward scaling) by utilizing the vertical space, effectively trading increased vertical complexity for reduced lateral footprint.
Solution Approach 2:
The vertical bipolar junction transistor structure nests multiple functional layers (emitter, base, collector) within a compact vertical arrangement, with the base layer penetrating through the dielectric layer. This nested configuration allows the transistor to achieve small lateral dimensions while containing all necessary functional elements within the vertical stack.
Data Source
AI summary
Structures that include bipolar junction transistors and methods of forming such structures. The structure comprises a semiconductor layer, a substrate, and a dielectric layer disposed between the semiconductor layer and the substrate. The structure further comprises a first bipolar junction transistor including a first collector in the substrate, a first emitter, and a first base layer. The first base layer extends through the dielectric layer from the first emitter to the first collector. The structure further comprises a second bipolar junction transistor including a second collector in the substrate, a second emitter, and a second base layer. The second base layer extends through the dielectric layer from the second emitter to the second collector. The second base layer is connected to the first base layer by a section of the semiconductor layer to define a base line.