Vertical BJT Array Layout for Scaled RRAM Bitcells
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Solution Overview
Problem
The scalability of resistive random-access memory devices is restricted due to minimum voltage and drive current requirements imposed on field-effect transistors, limiting the ability to shrink bitcell dimensions.
Innovation Solution
The structure includes an array of bipolar junction transistors formed with trench isolation regions and base layers, allowing for a compact design that eliminates the need for field-effect transistors as access transistors, enabling downward scaling of resistive random-access memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If field-effect transistors are used as access transistors in resistive random-access memory devices, then reliable operation is achieved, but minimum voltage and drive current requirements restrict the ability to shrink bitcell dimensions
Solution Approach 1:
The patent changes the transistor type from field-effect to bipolar junction transistor, fundamentally altering the electrical parameters (voltage and current requirements) to enable smaller bitcell dimensions while maintaining reliable operation. The bipolar transistor's different operational characteristics allow reduced size without sacrificing reliability.
Solution Approach 2:
The patent uses bipolar junction transistors as access transistors in resistive random-access memory bitcells, replacing the conventional field-effect transistor configuration. This substitution enables scaling to smaller dimensions while maintaining the essential access transistor function and reliable operation.
2Reliability
If field-effect transistors are used as access transistors, then operation reliability is maintained, but drive current requirements increase, limiting scalability
Solution Approach 1:
The patent changes the transistor type from field-effect to bipolar junction transistor, fundamentally altering the electrical parameters (voltage and current requirements) to enable smaller bitcell dimensions while maintaining reliable operation. The bipolar transistor's different operational characteristics allow reduced size without sacrificing reliability.
3Ease of manufacture
If conventional transistor structures are used, then manufacturing processes are established, but device complexity increases, restricting further scaling
Solution Approach 1:
The patent employs a vertical transistor structure where the base layer extends vertically through the trench isolation region, utilizing the vertical dimension to reduce planar footprint. This vertical configuration decreases device complexity in the plane while maintaining manufacturing feasibility through adapted fabrication processes.
Data Source
AI summary
Structures that include bipolar junction transistors and methods of forming such structures. The structure comprises a substrate having a top surface, a trench isolation region in the substrate, and a base layer on the top surface of the substrate. The base layer extending across the trench isolation region. A first bipolar junction transistor includes a first collector in the substrate and a first emitter on a first portion of the first base layer. The first portion of the first base layer is positioned between the first collector and the first emitter. A second bipolar junction transistor includes a second collector in the substrate and a second emitter on a second portion of the first base layer. The second portion of the first base layer is positioned between the second collector and the second emitter.