Vertical CASCODE Structure for Higher Gain in Less Area
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Solution Overview
Problem
Existing MOSFET-based CASCODE circuits require multiple devices connected in series, leading to increased occupation area and reduced intrinsic gain due to short channel effects, which hinders their scalability and performance in analog/RF applications.
Innovation Solution
A single structure CASCODE device is developed with gate metals of different work functions stacked vertically and source/drain regions isolated by an insulating film, allowing for multiple transistors to be connected in series or partially in parallel, reducing the occupation area and improving intrinsic gain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple MOSFETs are connected in series to form a CASCODE circuit, then intrinsic gain and analog/RF performance are improved, but occupation area increases
Solution Approach 1:
The patent transitions from a planar horizontal arrangement of MOSFETs to a vertical three-dimensional stacked configuration. Multiple channels are stacked vertically above the substrate, allowing multiple transistor functions to be integrated in the vertical dimension rather than requiring horizontal expansion, thereby reducing occupation area while maintaining CASCODE functionality
Solution Approach 2:
The patent implements a nested structure where multiple channels are stacked vertically, with each channel having its own source and drain regions. The isolation insulating film is embedded within this stacked structure to separate source and drain regions of different channels, creating a compact nested configuration that integrates multiple transistor functions in a single vertical column
Data Source
AI summary
Disclosed in a CASCODE device in which multiple transistors are stacked in a vertical direction and connected in series. The CASCODE device exhibits improvements in device/circuit intrinsic gain (GmRo) that is a performance index for analog/RF applications, cutoff frequency (Ft), and maximum oscillation frequency (Fmax). A method of manufacturing the CASCODE device is also disclosed.