Multi-Bridge Channel FET Structure for Dense Semiconductor Scaling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing demand for high-performance, high-speed, and multifunctional semiconductor devices requires finer patterns with narrower widths and smaller separation distances, while also overcoming the limitations of shrinking planar metal oxide semiconductor field effect transistors (FETs).
Innovation Solution
A semiconductor device is designed with multiple active regions on a substrate, each with specific channel layers, source/drain regions, and gate structures. The active regions have varying widths and conductivity types, optimized to balance driving current and capacitance, and are arranged in a multi-bridge channel FET structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If planar metal oxide semiconductor FETs are shrunk to increase integration, then device density increases, but operating characteristics deteriorate
Solution Approach 1:
The patent transitions from planar 2D channel structure to three-dimensional FinFET structure with vertical fins extending from the substrate. This dimensional change increases the effective channel area and driving current capability without increasing the planar footprint, thereby maintaining operating characteristics while achieving higher integration density.
Solution Approach 2:
The active region is divided into multiple fins spaced apart from each other in the vertical direction, creating multiple independent channel paths. This segmentation increases the total channel width and driving current while maintaining compact planar dimensions, resolving the contradiction between density and performance.
2Power
If active region width is increased to improve driving current, then electrical performance improves, but device area increases
Solution Approach 1:
Instead of increasing the planar width of the active region, the patent extends the channel vertically by creating multiple fins that protrude from the substrate surface. This allows the effective channel width to increase while the planar footprint remains compact, improving driving current without increasing device area.
Solution Approach 2:
The active region is segmented into multiple discrete fins spaced apart vertically. Each fin acts as an independent channel, and the collective effect of multiple fins provides high driving current while maintaining a compact overall device structure with limited planar area.
Data Source
AI summary
A semiconductor device includes a substrate including a first device region and a second device region, active regions spaced apart from each other on the substrate, having a constant width, extending in a first direction parallel to an upper surface of the substrate and including a first active region and a second active region provided on the first device region and a third active region and a fourth active region provided on the second device region, a plurality of channel layers provided on the active regions and configured to be spaced apart from each other in a direction perpendicular to the upper surface of the substrate, gate structures provided on the substrate and extending to cross the active regions and the plurality of channel layers, and source/drain regions provided on the active regions on at least one side of the gate structures.