Vertical-Channel Semiconductor Field-Stop Doping for High-Voltage Reliability

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Solution Overview

Problem

Existing IGBT devices have a low reliability due to the field-stop region's inability to handle high emitter-collector voltages and high temperatures in power applications, leading to malfunctioning and failure.

Innovation Solution

A manufacturing process for a vertical-channel semiconductor device that forms a thermally diffused conduction region with a high doping level, acting as a field-stop region, by implanting dopant ions and subsequent annealing to create a thick, diffused layer that extends between the back conduction region and the device functional layer, enhancing the device's reliability under high voltage and temperature conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a field-stop region is formed in known IGBT devices, then the voltage drop on the back side is controlled, but the reliability under high emitter-collector voltages and high temperatures becomes low

Engineering Contradiction:
ImprovereliabilityVSAvoidhigh emitter-collector voltages and high temperatures
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the doping parameters of the field-stop region, specifically forming a first doped region with a first conductivity type and a first doping level, and a second doped region with the same conductivity type but a second doping level higher than the first doping level. This parameter change enables the field-stop region to maintain low resistance under high voltage and temperature conditions, thereby improving reliability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent performs preliminary doping actions to form the field-stop region with specific doping levels before device operation. The first doped region is formed with a lower doping level and the second doped region with a higher doping level, creating a pre-optimized structure that can withstand high emitter-collector voltages and high temperatures from the outset

Inventive Principle:
Principle #10Preliminary action

2Reliability

If a field-stop region is formed to control voltage drop, then the electrical characteristics are improved, but the device fails under high voltage and temperature conditions

Engineering Contradiction:
Improvedevice reliabilityVSAvoidresistance to high voltage and temperature
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies local quality by creating regions with different doping levels within the field-stop structure. The first doped region has a first doping level while the second doped region has a second doping level higher than the first, allowing different parts of the field-stop region to serve different functions: voltage control and high-strength support under stress conditions

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The process results in a semiconductor device with improved reliability and electrical robustness, reducing the likelihood of malfunction and failure, even under high emitter-collector voltages and temperatures, making it suitable for power applications such as inverters and motor-control devices.

Implementation Method 1

forming, in the work wafer, from the second side of the work wafer, a first doped region having the first conductivity type and a second doping level higher than the first doping level

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

The manufacturing process includes forming, in the work wafer, from the second side of the work wafer, a first doped region having the first conductivity type and a second doping level higher than the first doping level

Methodology Applied
Scientific EffectThermal diffusion: Diffusion

Implementation Method 3

forming, in the work wafer, from the second side of the work wafer, a first doped region having the first conductivity type and a second doping level higher than the first doping level

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS20230326995A1Manufacturing process of a vertical-channel semiconductor device and vertical-channel semiconductor device
Publication Date: 2023.10.12 STMICROELECTRONICS SRL
  • US20230326995A1 patent drawing
  • US20230326995A1 patent drawing
  • US20230326995A1 patent drawing

AI summary

The present disclosure is directed to a vertical-channel semiconductor device. For manufacturing the vertical-channel semiconductor device, starting from a work wafer having a first side and a second side opposite to the first side along a direction, a first doped region is formed in the work wafer, from the second side of the work wafer. The work wafer has a first conductivity type and a first doping level, the first doped region has the first conductivity type and a second doping level higher than the first doping level. A device active region having a channel region extending in the direction is formed in the work wafer, on the first side of the work wafer. The first doped region and the device active region delimit, in the work wafer, a drift region. The first doped region is formed before the device active region.