Vertical Channel Transistor Structure for Higher Integration Density
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Solution Overview
Problem
As semiconductor devices undergo increased integration, reducing the size of transistors while maintaining performance has become a significant challenge due to the limitations of traditional horizontal channel structures.
Innovation Solution
The development of a semiconductor device with a vertical channel transistor structure, which includes a substrate, a first vertical channel extending from the substrate, a spacer at the end of the first vertical channel, and a second vertical channel aligned with the first on the spacer, allowing for a more compact and efficient design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional horizontal channel structure is used, then manufacturing process is simple, but integration degree is low and plane area is large
Solution Approach 1:
The patent transitions from a traditional horizontal channel structure to a vertical channel structure, changing the spatial dimension of the transistor channel from planar to three-dimensional. This dimensional change allows multiple channels to be stacked vertically, significantly increasing the integration degree while reducing the occupied plane area. The vertical channel extends in the thickness direction of the substrate, enabling higher density device arrangement.
2Productivity
If channel length is decreased to reduce transistor size, then integration degree increases, but manufacturing precision requirements increase
Solution Approach 1:
By transitioning to a vertical channel structure, the channel length is defined in the thickness direction rather than the planar direction. This allows for shorter effective channel lengths while maintaining better control over the channel dimensions through vertical epitaxial growth processes. The vertical orientation enables precise control of channel length independent of the lateral device footprint.
Solution Approach 2:
The patent employs vertical epitaxial growth to form the channel structure, changing the growth direction from lateral to vertical. This parameter change in the fabrication process enables precise control over channel length and thickness, achieving shorter channels with improved manufacturing precision through controlled vapor-phase deposition processes.
3Productivity
If layer thickness is reduced to decrease transistor size, then integration degree improves, but device complexity increases
Solution Approach 1:
The vertical channel structure redistributes the device dimensions, placing the channel length in the vertical thickness direction while reducing the lateral footprint. This dimensional reorganization allows for thinner effective channels with reduced lateral complexity, as the vertical growth process naturally defines the channel thickness without requiring complex lateral patterning steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This vertical channel structure enhances the integration degree of semiconductor devices by reducing the occupied plane area, enabling shorter channel lengths and thinner layers while maintaining high electrical performance.
Implementation Method 1
forming a first channel material layer having a sheet shape by growing a first channel material in a vertical direction on a substrate
Implementation Method 2
forming a second channel material layer having a sheet shape by growing a second channel material in the vertical direction from an upper portion of the first channel material layer
Implementation Method 3
forming an oxide layer by oxidizing an interface area of the first channel material layer and the second channel material layer
Data Source
AI summary
Provided is a semiconductor device including a substrate, a first vertical channel, a spacer, and a second vertical channel. The first vertical channel may have a sheet shape extending in a direction perpendicular to a surface of the substrate. The spacer may be provided at an end of the first vertical channel in an extension direction. The second vertical channel may be aligned with the first vertical channel on the spacer and have a sheet shape extending in a vertical direction.