Semiconductor Memory With Vertical Channels And Stacked Oxide Layers
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in improving integration density and electrical characteristics due to limitations in transistor design and manufacturing techniques.
Innovation Solution
The semiconductor memory device incorporates vertical channel transistors with a stacked channel structure comprising oxide semiconductor layers, including a first, second, and third channel layer, where the second channel layer is made of a different metal, and is in contact with the bit line, enhancing integration density and electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If vertical channel transistors are introduced to increase integration density, then integration density is improved, but device complexity increases
Solution Approach 1:
The patent transitions from planar horizontal channels to vertical channels that extend in the third dimension (depth). The channel pattern includes vertical channel portions protruding from horizontal channel portions, creating a three-dimensional structure that increases integration density by utilizing vertical space rather than only lateral expansion.
Solution Approach 2:
The channel pattern is segmented into multiple distinct components: horizontal channel portions, first vertical channel portions, and second vertical channel portions. These segmented structures are arranged in specific spatial relationships with word lines and bit lines, allowing complex functionality to be achieved through modular organization that manages device complexity.
2Reliability
If stacked channel layers with different metals are used to improve electrical characteristics, then electrical characteristics are improved, but manufacturing precision requirements increase
Solution Approach 1:
The channel layers are constructed as composite structures with at least a first channel layer including a first metal and a second channel layer including a second metal different from the first metal. This composite material approach allows optimization of electrical characteristics by combining materials with different properties, such as using one metal for high carrier density and another for high mobility.
Solution Approach 2:
Different metal materials are assigned to different channel layers based on their specific functional requirements. The first channel layer may use a metal optimized for carrier density while the second channel layer uses a metal optimized for carrier mobility. This local quality differentiation allows each layer to perform its specific function optimally without compromising the other.
Data Source
AI summary
A semiconductor memory device includes a bit line, a channel pattern including a horizontal channel portion on the bit line and a vertical channel portion vertically protruding from the horizontal channel portion, a word line on the horizontal channel portion and on a sidewall of the vertical channel portion, and a gate insulating pattern between the word line and the channel pattern. The channel pattern includes an oxide semiconductor and includes first, second, and third channel layers sequentially stacked. The first to third channel layers include a first metal, and the second channel layer further includes a second metal different from the first metal. At least a portion of the first channel layer contacts the bit line.