Vertical Channel Semiconductor Structure for Carrier Mobility
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Solution Overview
Problem
The challenge in semiconductor technology is to shrink device sizes while maintaining electrical performance, which is hindered by the presence of crystal interfaces that disrupt carrier mobility in semiconductor structures.
Innovation Solution
A semiconductor structure comprising a channel element with a substrate portion and a vertical channel portion made of single crystal silicon, where the substrate and vertical channel portions have a uniform and continuous crystal structure, eliminating internal crystal interfaces and enhancing carrier mobility. The manufacturing method involves patterning the channel material base to form a vertical channel portion and defining an upper substrate surface through etching steps, ensuring a solid pillar shape with no internal crystal interfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional semiconductor structures with multiple crystal regions are used, then device integration density can be improved, but carrier mobility deteriorates due to crystal interfaces
Solution Approach 1:
The channel element is segmented into a substrate portion and a vertical channel portion, where the vertical channel portion extends upward from the substrate. This segmentation allows the channel to utilize the third dimension for current flow, improving carrier mobility by avoiding lateral crystal interfaces while maintaining high integration density through vertical stacking of device components.
Solution Approach 2:
The invention transitions from a planar two-dimensional channel structure to a three-dimensional vertical channel structure. The vertical channel portion extends in the vertical dimension (z-direction) from the substrate surface, allowing carriers to move vertically rather than laterally through crystal interfaces, thus improving carrier mobility while enabling higher device integration density through vertical stacking.
2Quantity of substance
If device size is shrunk to improve integration density, then manufacturing precision requirements worsen due to smaller feature sizes
Solution Approach 1:
By moving the channel structure into the vertical dimension, the invention reduces the lateral footprint of each device while maintaining functional performance. This allows higher integration density without proportionally increasing manufacturing precision requirements, as the vertical dimension provides additional space for device components and interconnects.
Solution Approach 2:
The invention changes the geometric parameters of the channel structure by introducing a vertical component. Instead of shrinking lateral dimensions only, the channel height (vertical dimension) is utilized, allowing devices to maintain performance with smaller lateral footprints, thereby improving integration density without excessively tightening manufacturing precision requirements.
3Reliability
If vertical channel structure is implemented, then carrier mobility is improved through continuous crystal structure, but device complexity increases due to additional manufacturing steps
Solution Approach 1:
The channel element is divided into a substrate portion and a vertical channel portion, with the vertical channel portion formed by selective epitaxial growth on patterned substrate regions. This segmentation enables the continuous crystal structure needed for high carrier mobility while using established semiconductor manufacturing techniques to manage process complexity.
Solution Approach 2:
The substrate is pre-patterned with regions that will become vertical channel portions before epitaxial growth. This preliminary patterning using standard photolithography and etching techniques simplifies the overall process by preparing the substrate in advance, allowing the vertical channel structure to be formed through controlled epitaxial growth rather than requiring complex post-growth processing.
Data Source
AI summary
A semiconductor structure and a manufacturing method for the same are provided. The semiconductor structure comprises a channel element. The channel element comprises a substrate portion and a vertical channel portion. The vertical channel portion is adjoined on the substrate portion. The substrate portion and the vertical channel portion both comprise single crystal silicon.