Vertical Channel Semiconductor Devices With Stacked Gate Electrodes
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Solution Overview
Problem
The integration of two-dimensional semiconductor devices is limited by the cost of processing equipment required for fine pattern formation, which hinders increased integration and higher performance at a lower manufacturing cost.
Innovation Solution
A semiconductor device with a substrate featuring vertical channel structures and stacked gate electrodes, including line and contact regions, where the contact regions are thicker and spaced farther apart than the line regions, allowing for increased integration and reliability through a simpler manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If two-dimensional semiconductor device integration is increased by forming finer patterns, then device integration is improved, but manufacturing cost increases due to expensive processing equipment
Solution Approach 1:
The patent transitions from two-dimensional planar transistors to three-dimensional vertical channel transistors. The vertical channel structures extend perpendicular to the substrate surface, enabling multiple memory cells to be stacked vertically within the same footprint area. This dimensional change allows increased device integration without requiring finer lateral patterning, thereby avoiding the need for expensive advanced lithography equipment while achieving higher capacity.
2Reliability
If contact regions are made thicker to improve reliability, then manufacturing complexity increases, but device reliability is improved
Solution Approach 1:
The gate electrode structure incorporates regions with different thicknesses at different locations. The contact regions have increased thickness compared to the line regions, providing enhanced mechanical strength and electrical reliability where needed. This local variation in geometry allows the structure to meet reliability requirements without requiring uniform thickness increases throughout the entire electrode, thereby limiting the increase in manufacturing complexity.
Data Source
AI summary
A semiconductor device includes a comprise a substrate including a main zone and an extension zone, vertical channels on the main zone, and an electrode structure including gate electrodes stacked on the substrate. The vertical channel structures extend in a first direction perpendicular to a top surface of the substrate. The gate electrodes include line regions and contact regions. The line regions extend from the main zone toward the extension zone along a second direction the second direction that is perpendicular to the first direction. The contact regions are on ends of the line regions and are thicker than the line regions. A spacing distance in the second direction between the contact regions is greater than a spacing distance in the first direction between the line regions.