Vertical Channel Transistors Mitigating Floating Body Effect
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Solution Overview
Problem
Current manufacturing techniques for semiconductor devices with horizontal channel transistors face challenges in meeting the demands of smaller design rules, integration, operating speed, and yield, necessitating the development of more advanced transistor designs.
Innovation Solution
The fabrication of semiconductor devices with vertical channel transistors, featuring active pillars with vertical channels, word lines, bit lines, and conductive elements, where back-gates or body contacts are used to mitigate the floating body effect and enhance electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If horizontal channel transistors are used in conventional manufacturing techniques, then the manufacturing process is simpler and well-established, but the integration density, current driving ability, and resistance performance deteriorate under smaller design rules
Solution Approach 1:
The patent transitions from horizontal channel transistors to vertical channel transistors, changing the spatial orientation of the channel from in-plane to out-of-plane. This dimensional change allows the channel to extend vertically through multiple layers, enabling higher integration density and improved current driving ability while maintaining compatibility with conventional manufacturing processes
2Device complexity
If horizontal channel transistors are used, then the device structure is simpler, but the operating speed and yield deteriorate under advanced design rules
Solution Approach 1:
By orienting the channel vertically, the patent achieves shorter channel lengths and reduced parasitic resistance, which improve operating speed. The vertical configuration allows for better control of the channel and reduced interference between adjacent devices, enhancing yield while maintaining manageable device complexity
Solution Approach 2:
The patent modifies key geometric parameters by transitioning to vertical channels, achieving shorter effective channel lengths and optimized aspect ratios. This parameter change enables faster carrier transport and improved device performance without excessively increasing structural complexity
3Quantity of substance
If vertical channel transistors are implemented, then integration density, current driving ability, and resistance performance improve, but the device structure and manufacturing complexity increase
Solution Approach 1:
The vertical channel configuration utilizes the third dimension (vertical direction) to achieve higher integration density without proportionally increasing lateral footprint. This approach packs more transistors per unit area while keeping the overall device structure manageable through standardized vertical stacking
4Quantity of substance
If vertical channel transistors are used, then current driving ability and resistance performance improve, but the manufacturing precision requirements increase
Solution Approach 1:
The vertical channel formation leverages established vertical processing techniques such as selective epitaxial growth and vertical etching, which are well-controlled in conventional semiconductor manufacturing. This approach achieves the required precision for vertical channels while utilizing existing manufacturing capabilities
Data Source
AI summary
A semiconductor device has a plurality of vertical channels extending upright on a substrate, a plurality of bit lines extending among the vertical channels, a plurality of word lines which include a plurality of gates disposed adjacent first sides of the vertical channels, respectively, and a plurality of conductive elements disposed adjacent second sides of the vertical channels opposite the first sides. The conductive elements can provide a path to the substrate for charge carriers which have accumulated in the associated vertical channel to thereby mitigate a so-called floating effect.