Vertical CMOS Image Sensor Dark Shield Capacitance Reduction
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Solution Overview
Problem
CMOS image sensors face challenges in reducing parasitic capacitance between upper metal lines and dark shield layers, which is exacerbated by the close spatial alignment and formation difficulties of the dark shield layer.
Innovation Solution
A vertical type CMOS image sensor fabrication method involving the formation of an inter-metal dielectric layer, a passivation oxide layer with an inclined portion, a dark shield layer using a Ti/TiN multi-layer structure, and a nitride layer to reduce parasitic capacitance and improve light shielding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a thin layer of tungsten is used as dark shield layer to block light transmittance effectively, then light blocking performance is improved, but interactive capacitance between upper metal line and dark shield layer increases
Solution Approach 1:
The patent introduces an inclined passivation oxide layer as an intermediary structure between the upper metal line and the dark shield layer. This inclined layer acts as a mediator that spatially separates the two conductive elements, thereby reducing their capacitive coupling while allowing the dark shield layer to maintain its light-blocking function.
Solution Approach 2:
The patent transforms the traditional horizontal alignment approach into a three-dimensional inclined structure. By creating an inclined passivation oxide layer with a specific angle, the design moves from a two-dimensional planar arrangement to a three-dimensional configuration, increasing the vertical distance between the upper metal line and dark shield layer to reduce capacitance.
2Area of stationary object
If dark shield layer is formed close to upper metal line to save space, then area utilization is improved, but parasitic capacitance increases
Solution Approach 1:
The patent applies local quality by creating an inclined passivation oxide layer specifically in the region where the dark shield layer is formed, while maintaining different structures in other areas. This localized structural modification allows for reduced capacitance in the critical area without affecting the overall pixel layout and area utilization.
Solution Approach 2:
The patent performs preliminary action by forming the inclined passivation oxide layer before depositing the dark shield layer. This preparatory step establishes the spatial separation geometry in advance, ensuring that when the dark shield layer is formed, it is already positioned at an optimized distance from the upper metal line to minimize parasitic capacitance.
3Manufacturing precision
If alignment key is formed for defining dark shield layer position, then manufacturing precision is improved, but process complexity increases
Solution Approach 1:
The patent makes the passivation oxide layer multi-functional by giving it both its traditional insulation function and an additional alignment reference function. The inclined surface of the passivation oxide layer serves as a universal alignment key for positioning the dark shield layer, eliminating the need for separate alignment key structures and simplifying the overall fabrication process.
Solution Approach 2:
The patent implements self-service by designing the inclined passivation oxide layer to automatically serve as its own alignment reference. The inclined surface provides a natural, self-aligned guide for depositing the dark shield layer, allowing the structure to define its own positioning without requiring external alignment marks or additional alignment processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces parasitic capacitance and enhances light shielding by using the inclined passivation oxide layer as an alignment key and the TiN layer to absorb visible rays, thereby minimizing reflection and improving the image sensor's performance.
Implementation Method 1
the TiN layer to absorb visible rays, thereby minimizing reflection
Implementation Method 2
forming an inclined portion of the passivation oxide layer by a wet etching process
Data Source
AI summary
A vertical-type CMOS image sensor and a fabricating method thereof by which capacitance between an upper line and a dark shield layer can be effectively reduced. The vertical-type CMOS image sensor can include an inter-metal dielectric layer having a plurality of metal lines formed over a semiconductor substrate; a passivation oxide layer formed over the inter-metal dielectric layer, wherein the uppermost surface of the passivation oxide layer includes an inclined portion between a lower portion and an upper portion corresponding to a portion of the inter-metal dielectric layer having a plurality of the metal lines; a dark shield layer formed over the upper portion of the passivation oxide layer; and a nitride layer formed over the semiconductor substrate including the dark shield layer.