Vertical CMOS Image Sensor With Ion Implantation Isolation

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Solution Overview

Problem

Horizontal type CMOS image sensors face challenges in optimizing the process of forming photodiodes and transistors, leading to increased pixel size, reduced resolution, and poor sensitivity due to the need for shallow junctions and additional on-chip functions.

Innovation Solution

A vertical integration of circuitry and photodiodes is implemented, using a crystalline semiconductor layer with ion implantation isolation layers to minimize defects, prevent dark current, and enhance bondability and alignment, allowing for improved sensitivity and resolution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If extra on-chip functions are added to an image sensor, then functionality is improved, but pixel size increases

Engineering Contradiction:
Improveon-chip functionalityVSAvoidpixel size
Core Design Contradiction:
Adaptability or versatilityVSArea of moving object

Solution Approach 1:

By stacking the photodiode substrate vertically above the transistor substrate, the patent creates a three-dimensional integrated structure that reduces the horizontal footprint of each pixel. This vertical integration allows multiple functions to be packed into a smaller pixel area while maintaining all necessary on-chip functions

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If pixel size increases to accommodate extra functions, then functionality is improved, but resolution decreases

Engineering Contradiction:
Improveon-chip functionalityVSAvoidimage resolution
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The vertical stacking architecture enables high-density integration by utilizing the third dimension (depth) rather than expanding horizontally. This allows multiple functional elements to be stacked vertically within each pixel, maintaining small pixel dimensions and thereby preserving high image resolution while accommodating comprehensive on-chip functionality

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If photodiode area decreases to maintain pixel size, then pixel density is improved, but sensitivity deteriorates

Engineering Contradiction:
Improvepixel densityVSAvoidsensor sensitivity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent forms the photodiode in a separate crystalline substrate that is bonded vertically to the transistor substrate. This vertical configuration allows the photodiode to extend deeper into the substrate, increasing its light-sensitive volume and area without expanding the horizontal pixel footprint. Consequently, pixel density is maintained while sensitivity is enhanced through the increased photodiode volume

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The vertical integration of circuitry and photodiodes in CMOS image sensors achieves high sensitivity and resolution, minimizes defects, and optimizes pixel-to-pixel isolation, thereby improving image sensor performance.

Implementation Method 1

an ion implantation isolation layer in the photodiode

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS7867808B2Image sensor and method for manufacturing the same
Publication Date: 2011.01.11 VISIONX TECHNOLOGIES LLC
  • US7867808B2 patent drawing
  • US7867808B2 patent drawing
  • US7867808B2 patent drawing

AI summary

Embodiments relate to an image sensor and a method of manufacturing an image sensor. According to embodiments, an image sensor may include a first substrate, a photodiode, and an ion implantation isolation layer. According to embodiments, circuitry including a metal interconnection may be disposed over the first substrate. A photodiode may be provided in a crystalline semiconductor layer bonded to the first substrate, and electrically connected to the metal interconnection. The ion implantation isolation layer may be provided in the photodiode.