Vertical CMOS Image Sensor Annealing and Passivation

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Solution Overview

Problem

Conventional CMOS image sensors suffer from high dark leakage characteristics and the complexity of manufacturing, including the difficulty in integrating control circuits and signal processing, which also leads to the formation of circular defects due to thermal expansion mismatches in metal and dielectric layers during high-temperature annealing.

Innovation Solution

A method for manufacturing a vertical CMOS image sensor that involves a high-temperature double annealing process and the use of a passivation nitride film, such as SiON, to improve dark leakage characteristics while preventing or reducing circular defects by relieving stress in the dielectric materials and using a SiON or SiN passivation film to manage thermal expansion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high-temperature annealing is performed to improve dark leakage characteristics, then dark signal level is reduced, but circular defects are formed due to thermal expansion mismatch

Engineering Contradiction:
Improvedark leakage characteristicsVSAvoidcircular defects
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The annealing process is divided into multiple stages with different temperatures and atmospheres. First annealing is performed at 400-435°C after forming the first passivation film, then second annealing is performed at 435-450°C after forming the second passivation film. This segmentation allows stress relief at lower temperature followed by final treatment at higher temperature, preventing circular defects while improving dark leakage characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first passivation film is formed and first annealing is performed before forming the second passivation film. This preliminary action relieves stress in the dielectric materials early in the process, preventing thermal expansion mismatch defects before the final high-temperature annealing step.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If single annealing process is used, then manufacturing complexity is reduced, but dark leakage characteristics are insufficient

Engineering Contradiction:
Improvedark leakage characteristicsVSAvoidannealing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The annealing process is segmented into two distinct stages: first annealing at 400-435°C after first passivation film formation, and second annealing at 435-450°C after second passivation film formation. Each stage serves a specific purpose in stress relief and defect prevention, achieving superior dark leakage characteristics that cannot be obtained with a single annealing step.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The annealing parameters are changed between two stages: temperature range (400-435°C then 435-450°C), timing (after first passivation then after second passivation), and atmosphere conditions. These parameter changes optimize both stress relief and dark leakage reduction without requiring excessive process complexity.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If conventional passivation oxide film is used, then manufacturing simplicity is maintained, but stress relief is insufficient leading to circular defects

Engineering Contradiction:
Improvecircular defect preventionVSAvoidpassivation film structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The passivation structure uses composite materials: a first passivation oxide film (SiO2) formed by thermal oxidation, and a second passivation nitride film (Si3N4 or SiON) formed by CVD. This composite structure provides superior stress relief properties and thermal expansion mismatch prevention compared to conventional single-layer passivation, eliminating circular defects while maintaining manufacturing feasibility.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

Different passivation films are applied at different locations and stages: the first passivation oxide film is formed early for initial stress relief, and the second passivation nitride film is formed later for final stress management. Each layer has optimized properties for its specific function in the overall stress relief system.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively reduces dark leakage non-uniformity and prevents circular defects, enhancing the reliability and quality of the CMOS image sensor by optimizing the annealing process and using a passivation film with a lower thermal expansion coefficient.

Implementation Method 1

performing a first annealing at a first high temperature after the first passivation film is formed

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 2

relieving stress in the dielectric materials

Methodology Applied
Scientific EffectStress relaxation: Stress Relaxation

Implementation Method 3

performing a second, final annealing at a second high temperature after the second, uppermost passivation film is formed

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 4

manage thermal expansion

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 5

using a passivation nitride film, such as SiON, to improve dark leakage characteristics while preventing or reducing circular defects by relieving stress in the dielectric materials and using a SiN or SiN passivation film to manage thermal expansion

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS7754557B2Method for manufacturing vertical CMOS image sensor
Publication Date: 2010.07.13 DONGBU HITEK CO LTD
  • US7754557B2 patent drawing
  • US7754557B2 patent drawing
  • US7754557B2 patent drawing

AI summary

A method for manufacturing a vertical CMOS image sensor related to a semiconductor device is disclosed. A high-temperature double annealing process and/or an additional passivation nitride film are selectively applied in order to improve dark leakage characteristics and also to prevent or reduce an incidence of circular defects, thereby enhancing the quality and reliability of the vertical CMOS image sensor.