Vertical Conductive Structures in Power Transistors
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Solution Overview
Problem
Existing processes for forming power transistors with vertical conductive structures are complex and have a low process margin, which complicates the reduction of on-state resistance and figure of merit.
Innovation Solution
The process involves forming a buried conductive region, a semiconductor layer, and a dielectric layer, followed by the creation of horizontally-oriented doped regions and resurf regions, with vertical conductive structures being formed after conductive electrodes and gate electrodes, allowing for electrical connection between these regions and the buried conductive region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional processes are used to form vertical conductive structures in power transistors, then electrical connection between regions is achieved, but the process flow becomes overly complicated and process margin is reduced
Solution Approach 1:
The patent inverts the conventional sequence by forming vertical conductive structures after conductive electrodes and gate electrodes rather than before. This reversal simplifies the process flow while maintaining reliable electrical connections, as the vertical structures can be directly integrated with already-formed electrodes without requiring complex preliminary alignment and connection steps
2Reliability
If complex process flows are used to form vertical conductive structures, then electrical connection is improved, but on-state resistance and figure of merit cannot be effectively reduced
Solution Approach 1:
By reversing the formation sequence to create vertical conductive structures after electrodes and gates, the patent achieves both reliable electrical connection and improved device performance. This sequence allows for optimized integration that simultaneously enhances connection quality and reduces on-state resistance, thereby improving overall figure of merit without requiring overly complex processes
3Manufacturing precision
If vertical conductive structures are formed early in the process, then process margin is maintained, but the overall process flow becomes more complex
Solution Approach 1:
The patent forms vertical conductive structures later in the process after conductive electrodes and gate electrodes are established, which maintains adequate process margin while actually simplifying the overall process flow. This sequencing allows each structure to be formed with proper tolerances already defined by previously-formed elements, eliminating the need for complex preliminary coordination
Data Source
AI summary
An electronic device can include a buried conductive region and a semiconductor layer over the buried conductive region. The electronic device can further include a horizontally-oriented doped region and a vertical conductive region, wherein the vertical conductive region is electrically connected to the horizontally-oriented doped region and the buried conductive region. The electronic device can still further include an insulating layer overlying the horizontally-oriented doped region, and a first conductive electrode overlying the insulating layer and the horizontally-oriented doped region, wherein a portion of the vertical conductive region does not underlie the first conductive electrode. The electronic device can include a Schottky contact that allows for a Schottky diode to be connected in parallel with a transistor. Processes of forming an electronic device allow a vertical conductive region to be formed after a conductive electrode, a gate electrode, a source region, or both.