Vertical Contact Plugs for Non-Volatile Memory Integration

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Solution Overview

Problem

Current non-volatile semiconductor memory devices face challenges in simplifying manufacturing processes and reducing costs while achieving high integration density, particularly in the integration of resistance-change memory cells.

Innovation Solution

The proposed solution involves a non-volatile semiconductor memory device with a cell array structure that includes intersecting first and second wirings, with memory cells formed at their intersections, and the use of contact plugs that extend between layers to facilitate connections, allowing for a laminated structure that reduces the number of lithography processes and alignment errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional manufacturing processes are used for non-volatile semiconductor memory devices, then manufacturing precision can be maintained, but the manufacturing process becomes complex and costly

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidalignment precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent transitions from planar wiring connections to three-dimensional vertical connections using contact plugs that extend through insulating layers. This dimensional change allows wirings in different layers to connect without requiring precise planar alignment, thereby simplifying the manufacturing process while maintaining connection precision.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent divides the memory device into multiple layers with insulating layers separating conducting layers. Contact plugs segment the vertical connection path through these layers, allowing independent fabrication of each layer while maintaining overall structural integrity and alignment precision.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If integration density is increased in non-volatile semiconductor memory devices, then storage capacity improves, but manufacturing complexity and costs increase

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent achieves higher integration density by stacking multiple conducting layers vertically and connecting them through contact plugs. This three-dimensional architecture increases storage capacity without proportionally increasing manufacturing complexity, as the vertical stacking can be achieved through sequential layer deposition.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The contact plugs serve multiple functions: they provide electrical connections between different wiring layers, act as structural support elements, and enable the vertical stacking architecture. This multi-functionality reduces the need for additional specialized components, thereby controlling manufacturing complexity while increasing integration density.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Manufacturing precision

If conventional wiring connection methods are used, then manufacturing processes remain simple, but alignment errors increase and integration density is limited

Engineering Contradiction:
Improvealignment precisionVSAvoidintegration density
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent uses vertical contact plugs to connect wirings across multiple layers, transforming the alignment requirement from two-dimensional planar alignment to one-dimensional vertical alignment. This dimensional transformation improves alignment precision while enabling higher integration density through vertical stacking.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8792278B2Non-volatile memory semiconductor storage including contact plug
Publication Date: 2014.07.29 KIOXIA CORP
  • US8792278B2 patent drawing
  • US8792278B2 patent drawing
  • US8792278B2 patent drawing

AI summary

A non-volatile semiconductor memory device includes: a cell array including a plurality of first wirings, a plurality of second wirings that intersects the plurality of first wirings, and memory cells that are formed at intersections of the first wirings and the second wirings and are connected between the first and second wirings; a first contact plug that comes into contact with a side portion of the first wiring provided at a first position and extends to the first wiring provided at a second position higher than the first position in a laminated direction; and a second contact plug that comes into contact with a side portion of the second wiring provided at a third position between the first position and the second position and extends to the second wiring provided at a fourth position higher than the second position in the laminated direction.