Vertical Source/Drain Contacts for Void-Free C-FET Gap Fill

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Solution Overview

Problem

Existing complementary field effect transistor (C-FET) structures face challenges in achieving void-free gap filling in high aspect ratio openings during the formation of source/drain contacts, leading to potential merge issues during metal gap fill processes.

Innovation Solution

A deposition-etch-deposition process is employed to form source/drain contacts in a bottom-up manner, layer-by-layer, to improve gap fill capability and achieve void-free filling in high aspect ratio openings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional metal gap fill process is used, then manufacturing simplicity is maintained, but void formation occurs in high aspect ratio openings leading to merge issues

Engineering Contradiction:
Improvegap fill qualityVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The metal gap fill process is segmented into multiple deposition steps (first metal deposition, second metal deposition) separated by an etch back step. This segmentation allows each deposition step to fill the high aspect ratio opening more effectively without forming voids, while the etch back step removes excess material and prevents merging. The segmented approach transforms a single complex filling operation into manageable stages that collectively achieve void-free filling.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The process employs periodic action through alternating deposition and etch back cycles. The first metal is deposited, then partially removed by etch back, followed by deposition of the second metal. This periodic sequence of depositing and selectively removing material enables precise control over the filling process, ensuring complete void elimination while maintaining proper dimensional control and preventing unwanted merges between adjacent structures.

Inventive Principle:
Principle #19Periodic action

2Productivity

If high aspect ratio openings are formed for vertical stacking, then device density is improved, but gap fill capability deteriorates leading to void formation

Engineering Contradiction:
Improvedevice densityVSAvoidgap fill capability
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The solution uses composite material structure by forming a multi-layer metal fill structure consisting of different metal materials (first metal and second metal). Each metal layer is optimized for specific functions: the first metal provides initial gap filling, the etch back removes excess, and the second metal completes the filling and provides final structural integrity. This composite approach enables successful filling of high aspect ratio openings that would be impossible with a single material system.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The process changes material parameters by transitioning from a single metal deposition process to a multi-metal sequential deposition process with intermediate etch back. This parameter change includes altering the deposition material type, controlling deposition thickness at each stage, and applying selective removal. These parameter changes enable the filling process to adapt to the challenging geometry of high aspect ratio openings, achieving complete void-free filling while maintaining device density benefits.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method ensures void-free gap filling, enhancing the reliability and performance of semiconductor devices by preventing metal merge issues and improving contact integrity.

Implementation Method 1

performing a first deposition process to form a first metal in the opening

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

performing a second deposition process to form a second metal in the opening and over the first metal

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 3

performing a first etching back process to the first metal until the first void is absent

Methodology Applied
Scientific EffectPlasma Etching: Plasma

Data Source

PatentUS12527065B2Semiconductor device and method for forming the same
Publication Date: 2026.01.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12527065B2 patent drawing
  • US12527065B2 patent drawing
  • US12527065B2 patent drawing

AI summary

A method includes forming a first transistor over a substrate, in which the first transistor includes first source/drain epitaxy structures; forming a second transistor over the first transistor, in which the second transistor includes second source/drain epitaxy structures; forming an opening extending through one of the second source/drain epitaxy structures and exposing a top surface of one of the first source/drain epitaxy structures; performing a first deposition process to form a first metal in the opening, in which a first void is formed in the first metal during the first deposition process; performing a first etching back process to the first metal until the first void is absent; and performing a second deposition process to form a second metal in the opening and over the first metal.