Vertical Crossbar RRAM Cells Shared Bottom Electrode
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Solution Overview
Problem
Current resistive random access memory (RRAM) technologies face challenges in achieving high-density integration and scaling in crossbar array architectures due to process damage from reactive etching and inefficient use of chip area, limiting their application in neuromorphic computing and high-density non-volatile memory.
Innovation Solution
The method involves forming vertical crossbar RRAM cells using self-aligning techniques, where two cells are formed vertically on the sidewalls of a shared bottom electrode, isolated from each other, and integrated in a crossbar structure with one word line and two bit lines, avoiding reactive etching and optimizing chip area usage by sharing a bottom electrode between neighboring cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional RRAM cell formation methods are used, then RRAM cells can be formed in crossbar array architecture, but process damage occurs from reactive etching and chip area utilization is inefficient
Solution Approach 1:
The patent transitions from planar RRAM cell arrangement to vertical stacking architecture, where multiple RRAM cells are stacked along the vertical dimension. This allows two cells to be formed vertically on the sidewalls of a shared bottom electrode, effectively utilizing the third dimension (height) to increase storage density without expanding chip footprint. The vertical alignment of active areas enables high-density integration while avoiding the process damage associated with conventional reactive etching methods.
Solution Approach 2:
The patent merges multiple RRAM cells by having them share a common bottom electrode structure. Specifically, two RRAM cells are formed vertically on the sidewalls of a single shared bottom electrode, reducing the total number of electrodes required and improving chip area utilization. This merging approach eliminates redundant structures and optimizes the use of chip real estate while maintaining cell isolation through vertical positioning.
2Productivity
If RRAM cells are scaled down to increase density, then high-density integration is achieved, but process damage from reactive etching increases
Solution Approach 1:
The patent replaces the chemical reactive etching process with a mechanical or physical alternative. Instead of using reactive etching to form the RRAM cell structures, the invention employs vertical stacking with self-aligned formation methods that avoid the harmful chemical processes. This substitution enables scaling to 10 nm and below while preventing the process damage that typically increases at smaller dimensions.
Solution Approach 2:
The patent implements preliminary self-alignment of the RRAM cell structures during the formation process. By pre-establishing the vertical alignment of active areas and using self-aligned fabrication techniques, the process eliminates the need for subsequent reactive etching steps that would cause damage at scaled dimensions. The preliminary positioning of structures ensures accurate alignment without requiring damaging etching processes.
3Productivity
If more RRAM cells are integrated per chip area, then high-density memory is achieved, but parasitic cross-talk increases
Solution Approach 1:
By stacking RRAM cells vertically in the third dimension, the patent increases memory density without increasing lateral proximity between cells. The vertical separation between cells in the stack provides natural isolation that reduces parasitic cross-talk, while still achieving high density through the vertical arrangement. This dimensional transition allows cells to be closely packed in the vertical direction without the lateral interference that causes cross-talk in planar arrangements.
Solution Approach 2:
The patent introduces dielectric materials as intermediary layers between the vertically stacked RRAM cells. These dielectric layers act as mediators that electrically isolate adjacent cells in the vertical stack, preventing parasitic cross-talk while maintaining the high-density vertical configuration. The dielectric cap and other dielectric structures serve as protective intermediaries that enable high-density integration without the harmful effects of electrical interference between neighboring cells.
Data Source
AI summary
A method is presented for forming vertical crossbar resistive random access memory (RRAM) cells. The method includes forming a substantially U-shaped bottom electrode over a substrate, filling the U-shaped bottom electrode with a first conductive material, capping the U-shaped bottom electrode with a dielectric cap, depositing a high-k material, and forming a top electrode such that active areas of the RRAM cells are vertically aligned and the U-shaped bottom electrode is shared between neighboring RRAM cells.